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Data Sheet

AD7903

Rev. A | Page 21 of 28

CS Mode, 4-Wire Interface with Busy Indicator

CS mode, using a 4-wire interface with a busy indicator, is

usually used when an AD7903 is connected to a SPI-compatible

digital host with an interrupt input. This CS mode is also used

when it is desirable to keep CNVx, which is used to sample the

analog input, independent of the signal that is used to select the

data reading. This independence is particularly important in

applications where low jitter on CNVx is desired.

The connection diagram is shown in Figure 45, and the

corresponding timing is given in Figure 46.

With SDIx high, a rising edge on CNVx initiates a conversion,

selects CS mode, and forces SDOx to high impedance. In this

mode, CNVx must be held high during the conversion phase

and the subsequent data readback. (If SDIx and CNVx are low,

SDOx is driven low.) Prior to the minimum conversion time,

SDIx can be used to select other SPI devices, such as analog

multiplexers, but SDIx must be returned low before the

minimum conversion time elapses and then held low for the

maximum possible conversion time to guarantee the generation

of the busy signal indicator. When the conversion is complete,

SDOx goes from high impedance to low impedance. With a

pull-up on the SDOx line, this transition can be used as an

interrupt signal to initiate the data readback controlled by the

digital host. The AD7903 then enters the acquisition phase and

powers down. The data bits are then clocked out, MSB first, by

subsequent SCKx falling edges. The data is valid on both SCKx

edges. Although the rising edge can be used to capture the data,

a digital host using the SCKx falling edge allows a faster reading

rate, provided that it has an acceptable hold time. After the

optional 17th SCKx falling edge or SDIx going high (whichever

occurs first), SDOx returns to high impedance.

Figure 45. CS Mode, 4-Wire Interface with Busy Indicator Connection Diagram

Figure 46. CS Mode, 4-Wire Interface with Busy Indicator Serial Interface Timing

AD7903

SDIx

SDOx

CNVx

SCKx

CONVERT

DATA IN

CLK

DIGITAL HOST

IRQ

VIOx

47kΩ

CS1

tCONV

tCYC

ACQUISITION

tSSDICNV

ACQUISITION

tACQ

tSCK

tSCKH

tSCKL

CONVERSION

SDIx

tHSDICNV

SCKx

CNVx

SDOx

tEN

D15

D14

tHSDO

tDSDO

tDIS

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