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CS4225 Datasheet(PDF) 18 Page - Cirrus Logic

Part # CS4225
Description  Digital Audio Conversion System
PDF  30 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS4225 Datasheet(HTML) 18 Page - Cirrus Logic

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B7
B6
B5
B4
B3
B2
B1
B0
0
CO1
CO0
CI1
CI0
CS2
CS1
CS0
CS1 - CS0 Sets the source of the master clock
which runs the CS4225.
0 - Crystal Oscillator or XTI (PLL Disabled)
1 - PLL driven by LRCKAUX at 1 Fs
2 - PLL driven by LRCK at 1 Fs
3 - PLL driven by XTI/XTO (XTI at 1 Fs)
4 - PLL driven by SCLK at 32 Fs
5 - PLL driven by SCLK at 64 Fs
6 - PLL driven by SCLKAUX at 32 Fs
7 - PLL driven by SCLKAUX at 64 Fs
Cl1 - CI0
Determines frequency of XTI
when PLL is disabled.
0 - 256 Fs
1 - 384 Fs
2 - 512 Fs
3 - Reserved
CO1-CO0
Determines CLKOUT frequency
0 - 256 Fs
1 - 384 Fs
2 - 512 Fs
3 - 1 Fs
Clock Mode Byte (9)
B7
B6
B5
B4
B3
B2
B1
B0
MUTC CAL DEMC DEM MUT4 MUT3 MUT2 MUT1
MUT4 to
Mute Control Bits
MUT1
0 - Normal Output Level
1 - Selected DAC output muted
DEM
Selects De-Emphasis
0 - Normal Flat DAC frequency response
1 - CD De-Emphasis Selected
DEMC
Selects De-Emphasis Control Source
0 - De-emphasis is controlled by DEM
pin. DEM bit is ignored.
1 - De-emphasis is controlled by DEM bit.
DEM pin is ignored.
CAL
0 - Normal Operation
1 - Initiate Calibration
MUTC
Controls mute on consecutive zeros
function
0 - 512 consecutive zeros will mute DAC
1 - DAC output will not mute on zeros.
B7
B6
B5
B4
B3
B2
B1
B0
OVL1 OVL0 OV12 ACK
0
LOCK CALD
0
OVL1 to
16 - bit ADC overload bits.
OVL0
00 - Normal ADC input levels
01 - -6 dB level
10 - -3 dB level
11 - Clipping
Indicates one of the ADC’s has been
overdriven. These bits are "sticky".
They will stay set until read, when they
will return to 00 if the overload is no
longer present.
OV12
12-bit ADC overload bit
0 - normal input
1 - clipped input
This bit is also "sticky"
ACK
Control port data check bit
0 - Multiple of 8 clocks received
last word (SPI Mode)
1 - Error, not multiple of 8 clocks received.
LOCK
PLL lock indicator
0 - PLL not locked. If PLL is selected,
DAC outputs will mute
1 - PLL locked
CALD
0 - Calibration done
1 - Calibration in progress
Status Report Byte (11)
B7
B6
B5
B4
B3
B2
B1
B0
000000
IS1
IS0
IS1 - IS0
Select input channel
0 - Select AIN1
1 - Select AIN2
2 - Select AIN3
3 - Select Auxiliary Digital Input Port
Input Selection Byte (12)
B7
B6
B5
B4
B3
B2
B1
B0
AIM
0000000
AIM
Auxiliary Input Mode Control Bit
0 - AINAUX signal is routed to 12-bit ADC
1 - AINAUX routed to AINL of 16-bit ADC
Aux Control Byte (13)
Control Byte (10)
CS4225
18
DS86PP8



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