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CS49400 Datasheet(PDF) 84 Page - Cirrus Logic |
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CS49400 Datasheet(HTML) 84 Page - Cirrus Logic |
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84 / 100 page ![]() 84 11.8 Creating Hardware Configuration Messages The single hardware configuration message that must be sent to the CS49400 after download or soft reset should be a concatenation of the messages in the previous sections. The complete hardware configuration message should be created by taking a message for each parameter (where the default is not acceptable) and concatenating the messages together. No messages need to be sent if the default configuration for a particular parameter is acceptable. This example can be easily expanded to fit other system requirements. E.g. if the host system has this configuration: Address Checking: Disabled This is the default configuration so no configuration message is required. DAI:Left Justified PCM and Compressed data CDI:Not used The above configuration corresponds to INPUT A1 B1 which corresponds to a configuration message of: 0x800210 0x3FBFC0 0x800110 0xC0002C 0x800217 0x8080FF 0x80021A 0x8080FF 0x800117 0x001000 0x80011A 0x001800 DAO:Left Justified slave mode (LRCLK, SCLK inputs) MCLK @ 256Fs SCLK @ 64Fs The above configuration corresponds to OUTPUT A0B1C0D0 which has a configuration message of: 0x81800003 0xFFFE3FFF 0x81400003 0x0000C000 0x81000005 0x00101701 0x81000006 0x00100000 0x81000007 2 MCLK = 256 FS SCLK = MCLK / 1 = 256 FS LRCLK = SCLK / 256 = FS 0x81800003 0xFFFFFC7F 0x81400003 0x00000300 0x81000009 0x00377000 3 MCLK = 512 FS SCLK = MCLK / 8 = 64 FS LRCLK = SCLK / 64 = FS 0x81800003 0xFFFFFC7F 0x81400003 0x00000100 0x81000009 0x00077070 4 MCLK = 128FS SCLK = MCLK / 2 = 64FS LRCLK = SCLK / 64 = FS 0x81800003 0xFFFFFC7F 0x81400003 0x00000100 0x81000009 0x00077010 DValue SCLK Polarity Hex Message 0 (default) Data Valid on Rising Edge (clocked out on falling) 0x81800003 0xFFFBFFFF 1 Data Valid on Falling Edge (clocked out on rising) 0x81400003 0x00040000 Table 30. Output SCLK Polarity Configuration (Parameter D) C Value SCLK/LRCLK Frequency Hex Message Table 29. Output SCLK/LRCLK Configuration (Parameter C) |
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