DS1820 datasheet(3/27 Pages) DALLAS

3 / 27 page

+5V

DS1820

I/O

4.7K

µP

VDD

GND

DS1820

030598 3/27

PARASITE POWER

The block diagram (Figure 1) shows the parasite pow-

ered circuitry. This circuitry “steals” power whenever the

I/O or VDD pins are high. I/O will provide sufficient power

as long as the specified timing and voltage require-

ments are met (see the section titled “1–Wire Bus Sys-

tem”). The advantages of parasite power are two–fold:

1) by parasiting off this pin, no local power source is

needed for remote sensing of temperature, and 2) the

ROM may be read in absence of normal power.

In order for the DS1820 to be able to perform accurate

temperature conversions, sufficient power must be pro-

vided over the I/O line when a temperature conversion is

taking place. Since the operating current of the DS1820

is up to 1 mA, the I/O line will not have sufficient drive

due to the 5K pull–up resistor. This problem is particu-

larly acute if several DS1820’s are on the same I/O and

attempting to convert simultaneously.

There are two ways to assure that the DS1820 has suffi-

cient supply current during its active conversion cycle.

The first is to provide a strong pull–up on the I/O line

whenever temperature conversions or copies to the E2

memory are taking place. This may be accomplished by

using a MOSFET to pull the I/O line directly to the power

supply as shown in Figure 2. The I/O line must be

switched over to the strong pull–up within 10

µs maxi-

mum after issuing any protocol that involves copying to

the E2 memory or initiates temperature conversions.

When using the parasite power mode, the VDD pin must

be tied to ground.

Another method of supplying current to the DS1820 is

through the use of an external power supply tied to the

VDD pin, as shown in Figure 3. The advantage to this is

that the strong pull–up is not required on the I/O line, and

the bus master need not be tied up holding that line high

during temperature conversions. This allows other data

traffic on the 1–Wire bus during the conversion time. In

addition, any number of DS1820’s may be placed on the

1–Wire bus, and if they all use external power, they may

all simultaneously perform temperature conversions by

issuing the Skip ROM command and then issuing the

Convert T command. Note that as long as the external

power supply is active, the GND pin may not be floating.

The use of parasite power is not recommended above

100

°C, since it may not be able to sustain communica-

tions given the higher leakage currents the DS1820

exhibits at these temperatures.

For applications in

which such temperatures are likely, it is strongly recom-

mended that VDD be applied to the DS1820.

For situations where the bus master does not know

whether the DS1820’s on the bus are parasite powered

or supplied with external VDD, a provision is made in the

DS1820 to signal the power supply scheme used. The

bus master can determine if any DS1820’s are on the

bus which require the strong pull–up by sending a Skip

ROM protocol, then issuing the read power supply com-

mand. After this command is issued, the master then

issues read time slots. The DS1820 will send back “0”

on the 1–Wire bus if it is parasite powered; it will send

back a “1” if it is powered from the VDD pin. If the master

receives a “0”, it knows that it must supply the strong

pull–up on the I/O line during temperature conversions.

See “Memory Command Functions” section for more

detail on this command protocol.

STRONG PULL–UP FOR SUPPLYING DS1820 DURING TEMPERATURE CONVERSION Figure 2

DS1820 Datasheet(PDF) 3 Page - Dallas Semiconductor

DS1820 Datasheet(HTML) 3 Page - Dallas Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27

Datasheet Download

Link URL