ADP3650 datasheet(3/12 Pages) AD

3 / 12 page

ADP3650

Rev. A | Page 3 of 12

SPECIFICATIONS

VCC = 12 V, BST = 4 V to 26 V, TA = −40°C to +85°C, unless otherwise noted.1

Table 1.

Parameter

Symbol

Test Conditions/Comments

Min

Typ

Max

Unit

DIGITAL INPUTS (IN, OD)

Input Voltage High

2.0

Input Voltage Low

0.8

Input Current

−1

μA

Hysteresis

250

350

HIGH-SIDE DRIVER

Output Resistance, Sourcing Current

BST − SW = 12 V; TA = 25°C

3.3

BST − SW = 12 V; TA = −40°C to +85°C

2.5

3.9

Output Resistance, Sinking Current

BST − SW = 12 V; TA = 25°C

1.8

BST − SW = 12 V; TA = −40°C to +85°C

1.4

2.6

Output Resistance, Unbiased

BST − SW = 0 V

kΩ

Transition Times

trDRVH

BST − SW = 12 V, CLOAD = 3 nF, see Figure 3

tfDRVH

BST − SW = 12 V, CLOAD = 3 nF, see Figure 3

Propagation Delay Times

tpdhDRVH

BST − SW = 12 V, CLOAD = 3 nF,

25°C ≤ TA ≤ 85°C, see Figure 3

tpdlDRVH

BST − SW = 12 V, CLOAD = 3 nF, see Figure 3

pdl

See Figure 2

pdh

See Figure 2

SW Pull-Down Resistance

SW to PGND

kΩ

LOW-SIDE DRIVER

Output Resistance, Sourcing Current

TA = 25°C

3.3

TA = −40°C to +85°C

2.4

3.9

Output Resistance, Sinking Current

TA = 25°C

1.8

TA = −40°C to +85°C

1.4

2.6

Output Resistance, Unbiased

VCC = PGND

kΩ

Transition Times

trDRVL

CLOAD = 3 nF, see Figure 3

tfDRVL

CLOAD = 3 nF, see Figure 3

Propagation Delay Times

tpdhDRVL

CLOAD = 3 nF, see Figure 3

tpdlDRVL

CLOAD = 3 nF, see Figure 3

pdl

See Figure 2

pdh

See Figure 2

110

190

Timeout Delay

SW = 5 V

110

190

SW = PGND

150

SUPPLY

Supply Voltage Range

VCC

4.15

13.2

Supply Current

ISYS

BST = 12 V, IN = 0 V

UVLO Voltage

VCC rising

1.5

3.0

Hysteresis

350

1 All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC) methods.

ADP3650 Datasheet(PDF) 3 Page - Analog Devices

ADP3650 Datasheet(HTML) 3 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12

Datasheet Download

Link URL