MB89181 datasheet(41/50 Pages) FUJITSU

41 / 50 page

MB89180 Series

(Continued)

Columns indicate the following:

Mnemonic:

Assembler notation of an instruction

Number of instructions

Number of bytes

Operation:

Operation of an instruction

TL, TH, AH:

A content change when each of the TL, TH, and AH instructions is executed. Symbols in

the column indicate the following:

•

“–” indicates no change.

• dH is the 8 upper bits of operation description data.

• AL and AH must become the contents of AL and AH immediately before the instruction

is executed.

• 00 becomes 00.

N, Z, V, C:

An instruction of which the corresponding flag will change. If + is written in this column,

the relevant instruction will change its corresponding flag.

OP code:

Code of an instruction. If an instruction is more than one code, it is written according to

the following rule:

Example: 48 to 4F

← This indicates 48, 49, ... 4F.

Symbol

Meaning

Extra pointer EP (16 bits)

Program counter PC (16 bits)

Stack pointer SP (16 bits)

Program status PS (16 bits)

Accumulator A or index register IX (16 bits)

CCR

Condition code register CCR (8 bits)

General-purpose register Ri (8 bits, i = 0 to 7)

Indicates that the very

× is the immediate data.

(Whether its length is 8 or 16 bits is determined by the instruction in use.)

( × )

Indicates that the contents of

× is the target of accessing.

(Whether its length is 8 or 16 bits is determined by the instruction in use.)

((

× ))

The address indicated by the contents of

× is the target of accessing.

(Whether its length is 8 or 16 bits is determined by the instruction in use.)

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