WM1811A datasheet(191/328 Pages) WOLFSON

191 / 328 page

Production Data

WM1811A

PD, November 2013, Rev 4.1

191

In order to follow the above requirements for FVCO, the value of FLLn_OUTDIV should be selected

according to the desired output FOUT. The divider, FLLn_OUTDIV, must be set so that FVCO is in the

range 90-100MHz. The available divisions are integers from 4 to 64. Some typical settings of

FLLn_OUTDIV are noted in Table 113.

OUTPUT FREQUENCY FOUT

FLLn_OUTDIV

1.875 MHz - 2.0833 MHz

101111 (divide by 48)

2.8125 MHz - 3.125 MHz

011111 (divide by 32)

3.75 MHz - 4.1667 MHz

010111 (divide by 24)

5.625 MHz - 6.25 MHz

001111 (divide by 16)

11.25 MHz - 12.5 MHz

000111 (divide by 8)

18 MHz - 20 MHz

000100 (divide by 5)

22.5 MHz - 25 MHz

000011 (divide by 4)

Table 113 Selection of FLLn_OUTDIV

The value of FLLn_FRATIO should be selected as described in Table 114.

REFERENCE FREQUENCY FREF

FLLn_FRATIO

1MHz - 13.5MHz

0h (divide by 1)

256kHz - 1MHz

1h (divide by 2)

128kHz - 256kHz

2h (divide by 4)

64kHz - 128kHz

3h (divide by 8)

Less than 64kHz

4h (divide by 16)

Table 114 Selection of FLLn_FRATIO

In order to determine the remaining FLL parameters, the FLL operating frequency, FVCO, must be

calculated, as given by the following equation:

FVCO = (FOUT x FLLn_OUTDIV)

The value of N.K can then be determined as follows:

N.K = FVCO / (FLLn_FRATIO x FREF)

Note that, in the above equations:

FLLn_OUTDIV is the FOUT clock ratio.

FREF is the input frequency, after division by FLL_REFCLK_DIV, where applicable.

FLLn_FRATIO is the FVCO clock ratio (1, 2, 4, 8 or 16).

The value of N is held in the FLLn_N register field.

The value of K is determined by the ratio FLLn_THETA / FLLn_LAMBDA.

The FLLn_N, FLLn_THETA and FLLn_LAMBDA fields are all coded as integers (LSB = 1).

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