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WM1811A Datasheet(PDF) 267 Page - Wolfson Microelectronics plc

Part # WM1811A
Description  Multi-Channel Audio Hub CODEC for Smartphones
PDF  328 Pages
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Manufacturer  WOLFSON [Wolfson Microelectronics plc]
Direct Link  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM1811A Datasheet(HTML) 267 Page - Wolfson Microelectronics plc

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Production Data
WM1811A
w
PD, November 2013, Rev 4.1
267
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R772 (0304h)
AIF1ADC
LRCLK
12
AIF1ADC_LRCLK
_INV
0
Right, left and I2S modes – ADCLRCLK1 polarity
0 = normal ADCLRCLK1 polarity
1 = invert ADCLRCLK1 polarity
Note that AIF1ADC_LRCLK_INV selects the ADCLRCLK1 polarity in Master
mode and in Slave mode.
DSP Mode – mode A/B select
0 = MSB is available on 2nd BCLK1 rising edge after ADCLRCLK1 rising
edge (mode A)
1 = MSB is available on 1st BCLK1 rising edge after ADCLRCLK1 rising
edge (mode B)
11
AIF1ADC_LRCLK
_DIR
0
Allows ADCLRCLK1 to be enabled in Slave mode
0 = Normal
1 = ADCLRCLK1 enabled in Slave mode
10:0
AIF1ADC_RATE
[10:0]
000_0100_000
0
ADCLRCLK1 Rate
ADCLRCLK1 clock output =
BCLK1 / AIF1ADC_RATE
Integer (LSB = 1)
Valid from 8..2047
Register 0304h AIF1ADC LRCLK
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R773 (0305h)
AIF1DAC
LRCLK
12
AIF1DAC_LRCLK
_INV
0
Right, left and I2S modes – LRCLK1 polarity
0 = normal LRCLK1 polarity
1 = invert LRCLK1 polarity
Note that AIF1DAC_LRCLK_INV selects the LRCLK1 polarity in Master
mode and in Slave mode.
DSP Mode – mode A/B select
0 = MSB is available on 2nd BCLK1 rising edge after LRCLK1 rising edge
(mode A)
1 = MSB is available on 1st BCLK1 rising edge after LRCLK1 rising edge
(mode B)
11
AIF1DAC_LRCLK
_DIR
0
Allows LRCLK1 to be enabled in Slave mode
0 = Normal
1 = LRCLK1 enabled in Slave mode
10:0
AIF1DAC_RATE
[10:0]
000_0100_000
0
LRCLK1 Rate
LRCLK1 clock output =
BCLK1 / AIF1DAC_RATE
Integer (LSB = 1)
Valid from 8..2047
Register 0305h AIF1DAC LRCLK



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