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WM1811A Datasheet(PDF) 271 Page - Wolfson Microelectronics plc

Part # WM1811A
Description  Multi-Channel Audio Hub CODEC for Smartphones
PDF  328 Pages
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Manufacturer  WOLFSON [Wolfson Microelectronics plc]
Direct Link  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM1811A Datasheet(HTML) 271 Page - Wolfson Microelectronics plc

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Production Data
WM1811A
w
PD, November 2013, Rev 4.1
271
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R789 (0315h)
AIF2DAC
LRCLK
12
AIF2DAC_LRCLK
_INV
0
Right, left and I2S modes – LRCLK2 polarity
0 = normal LRCLK2 polarity
1 = invert LRCLK2 polarity
Note that AIF2DAC_LRCLK_INV selects the LRCLK2 polarity in Master
mode and in Slave mode.
DSP Mode – mode A/B select (AIF2 input)
0 = MSB is available on 2nd BCLK2 rising edge after LRCLK2 rising edge
(mode A)
1 = MSB is available on 1st BCLK2 rising edge after LRCLK2 rising edge
(mode B)
11
AIF2DAC_LRCLK
_DIR
0
Allows LRCLK2 to be enabled in Slave mode
0 = Normal
1 = LRCLK2 enabled in Slave mode
10:0
AIF2DAC_RATE
[10:0]
000_0100_000
0
LRCLK2 Rate
LRCLK2 clock output =
BCLK2 / AIF2DAC_RATE
Integer (LSB = 1)
Valid from 8..2047
Register 0315h AIF2DAC LRCLK
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R790 (0316h)
AIF2DAC
Data
1
AIF2DACL_DAT_I
NV
0
AIF2 Left Receive Data Invert
0 = Not inverted
1 = Inverted
0
AIF2DACR_DAT_
INV
0
AIF2 Right Receive Data Invert
0 = Not inverted
1 = Inverted
Register 0316h AIF2DAC Data
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R791 (0317h)
AIF2ADC
Data
1
AIF2ADCL_DAT_I
NV
0
AIF2 Left Transmit Data Invert
0 = Not inverted
1 = Inverted
0
AIF2ADCR_DAT_
INV
0
AIF2 Right Transmit Data Invert
0 = Not inverted
1 = Inverted
Register 0317h AIF2ADC Data
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R792 (0318h)
AIF2TX
Control
1
AIF2TXL_ENA
1
Enable AIF2DAC (Left) input path
0 = Disabled
1 = Enabled
This bit must be set for AIF2 output of the AIF2ADC (Left) signal. For AIF3
output only, this bit can be set to 0.



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