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HT16512 Datasheet(PDF) 6 Page - Holtek Semiconductor Inc |
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HT16512 Datasheet(HTML) 6 Page - Holtek Semiconductor Inc |
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6 / 12 page  HT16512 6 December 24, 1999 Functional Description Display RAM and display mode The static display RAM is organized into 22´8 bits and stores the data transmitted from an ex- ternal device to the HT16512 through a serial interface. The contents of the RAM are directly mapped to the contents of the VFD driver. Data in the RAM can be accessed through the data setting, address setting and display control commands. It is assigned addresses in 8-bit unit as follows: Dimming control HT16512 porvides 8-step dimmer function on display by controlling the 3-bit binary com- mand code. The full pulse width of grid signal is divides into 16 uniform sections by PWM (pulse width modulation) technology. The 16 uniform sections available form 8 steps dimmer via 3-bit binary code. The 8-step dim- mer includes 1/16, 2/16, 4/16, 10/16, 11/16, 12/16, 13/16 and 14/16. The 1/16 pulse width in- dicates minimum lightness. The 14/16 pulse width represents maximum lightness. (Refer to the display control command). Key matrix and key-input data storage RAM The key matrix scans the series key states at each level of the key strobe signal (S0/K0~S5/K5) output of the HT16512. The key strobe signal outputs are time-multiplexed sig- nals from S0/K0~S5/K5. The states of inputs K0~K3 are sampled by strobe signal S0/K0~S5/K5 and latched into the register. The key matrix is made up of a 6´4 matrix, as shown below. The data of each key is stored as illustrated be- low, and is read with the read command, start- ing from the least significant bit. LED port The LED port belongs to the CMOS output con- figuration. Data is written to the LED port with the write command, starting from the least port¢s least significant bit. In our application (see applica- tion circuits), the user adopts an internal NMOS device to a driver LED component by connecting VDD. When a bit of this port is 0, the corresponding LED lights; when the bit is 1, the LED turns off. The data of bits 5 through 8 are ignored. S0 A ddr es s : 00H 02H 04H 06H 08H 0A H 0C H 0E H 10H 12H 14H b0 b1 b2 b3 b4 b5 b6 b7 01H 03H 05H 07H 09H 0B H 0D H 0F H 11H 13H 15H b0 b1 b2 b3 b4 b5 b6 b7 Di g i t 0 Di g i t 1 Di g i t 2 Di g i t 3 Di g i t 4 Di g i t 5 Di g i t 6 Di g i t 7 Di g i t 8 Di g i t 9 Di g i t 1 0 S3 S4 ~ S7 ~ S8 S1 1 S 1 2 ~ S1 5 ~ S5 / K 5 S4 / K 4 K3 K2 K1 K0 S3 / K 3 S0 / K 0 S 1 / K 1 S2 / K 2 Ke y m a t r i x De t a i l S4 / K 4 b0 b1 b2 b3 b4 b5 b6 b7 S2 / K 2 S0 / K 0 S5 / K 5 S3 / K 3 S1 / K 1 K0 ~ K 3 K0 ~ K 3 R eadi ng f i r s t R eadi ng l a s t MS B L S B b0 b1 b2 b3 LE D 0 LE D 1 LE D 2 LE D 3 D on' t c a r e |
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