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GMS81C50 Datasheet(PDF) 48 Page - Hynix Semiconductor |
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GMS81C50 Datasheet(HTML) 48 Page - Hynix Semiconductor |
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48 / 99 page ![]() HYUNDAI GMS81C50 Series 45 Figure 11-4 Timer / Counter Block diagram (2) Function of Timer & Counter T2 OUT / R15 TIMER0 (16 BIT) Polarity Selection T0HMD T0HLD T0LMD T0LLD Tout LOGIC T1HD T1LD TIMER1 (8 BIT) EDGE Selection T1 OUT / R16 REMOUT T0 OUT / R17 EC / R14 INT2 / R12 (Capture Signal) 16 88 8 8 88 16 TIMER2 (8 BIT) T2DR PS0 ( 0.25 us) 16,384 us PS0 ( 0.25 us) 64 us PS5 ( 8 us) 2.048 us PS1 ( 0. 5 us) 32,768 us PS1 ( 0.5 us) 128 us PS6 ( 16 us) 4,096 us PS2 ( 1 us) 65,536 us PS2 ( 1 us) 256 us PS7 ( 32 us) 8,192 us PS3 ( 2 us) 131,072 us PS3 ( 2 us) 512us PS8 ( 64 us) 16,384 us PS4 ( 4 us) 262,144 us PS7 ( 32 us) 8,192 us PS9 ( 128 us) 32,768 us PS5 ( 8 us) 524,288 us PS8 ( 64 us) 16,384 us PS10 ( 256 us) 65,536 us PS11 ( 512 us) 33,554,432 us PS9 ( 128 us) 32,768 us PS11 ( 512 us) 131,072 us EC - PS10 ( 256 us) 65,536 us PS12 (1,024 us) 262,144 us fex = 4MHz 16bit Timer (T0) 8bit Timer (T1) 8bit Timer (T2) Resolution (CK) Max. Count Resolution (CK) Max. Count Resolution (CK) Max. Count |
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