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GMS90C51 Datasheet(PDF) 26 Page - Hynix Semiconductor |
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GMS90C51 Datasheet(HTML) 26 Page - Hynix Semiconductor |
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26 / 59 page ![]() GMS90 Series 22 Dec. 1998 Ver 3.0 INTERRUPT SYSTEM The GMS90 series provides 5 (4K bytes ROM version) or 6 (above 8K bytes ROM version) interrupt sources with two priority levels. Figure 3 gives a general overview of the interrupt sources and illustrates the request and control flags. Figure 3. Interrupt Request Sources PT0 IP.1 PT1 IP.3 PT2 IP.5 PS IP.4 PX0 IP.0 PX1 IP.2 EA IE.7 ET0 IE.1 ET1 IE.3 ET2 IE.5 ES IE.4 EX0 IE.0 EX1 IE.2 TF0 TCON.5 TF1 TCON.7 ≥1 TF2 T2CON.7 EXF2 T2CON.6 ≥1 RI SCON.0 TI SCON.1 IE0 TCON.1 IE1 TCON.3 IT0 TCON.0 IT1 TCON.2 P3.2/ INT0 P3.3/ INT1 EXEN2 T2CON.3 P1.1/ T2EX Timer 2 Overflow Timer 0 Overflow Timer 1 Overflow : Low level triggered : Falling edge triggered Low Priority High Priority UART |
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