GMS90C51 datasheet(31/59 Pages) HYNIX

31 / 59 page

GMS90 Series

Dec. 1998 Ver 3.0

1) Capacitive loading on ports 0 and 2 may cause spurious noise pulses to be superimposed on the VOL of ALE and port 3.

The noise is due to external bus capacitance discharging into the port 0 and port 2 pins when these pins make 1-to-0 tran-

sitions during bus operation. In the worst case (capacitive loading:

> 50pF at 3.3V, > 100pF at 5V), the noise pulse on ALE

line may exceed 0.8V. In such cases it may be desirable to qualify ALE with a schmitt-trigger, or use an address latch with

a schmitt-trigger strobe input.

2) Capacitive loading on ports 0 and 2 may cause the VOH on ALE and PSEN to momentarily fall below the 0.9VCC specifica-

tion when the address lines are stabilizing.

3) ICC Max at other frequencies is given by:

active mode: ICC = 1.27 × fOSC + 5.73

idle mode:

ICC = 0.28 × fOSC + 1.45 (except OTP devices)

where fOSC is the oscillator frequency in MHz. ICC values are given in mA and measured at VCC = 5V.

4) ICC (active mode) is measured with:

XTAL1 driven with tCLCH, tCHCL = 5ns, VIL = VSS + 0.5V, VIH = VCC - 0.5V; XTAL2 = N.C.;

EA = Port0 = RESET = VCC; all other pins are disconnected. ICC would be slightly higher if a crystal oscillator is used (appr.

1mA).

5) ICC (Idle mode) is measured with all output pins disconnected and with all peripherals disabled;

XTAL1 driven with tCLCH, tCHCL = 5ns, VIL = VSS + 0.5V, VIH = VCC - 0.5V; XTAL2 = N.C.;

RESET = EA = VSS; Port0 = VCC; all other pins are disconnected;

6) IPD (Power Down Mode) is measured under following conditions:

EA = Port0 = VCC; RESET = VSS; XTAL2 = N.C.; XTAL1 = VSS; all other pins are disconnected.

GMS90C51 Datasheet(PDF) 31 Page - Hynix Semiconductor