HMS87C1102 datasheet(65/88 Pages) HYNIX

65 / 88 page

Apr. 2001 ver 1.0

HMS87C130XA/120XA/110XA

Figure 17-3 Timing of STOP Mode Release by RESET

17.2 Wake-up Timer Mode

In the Wake-up Timer mode, the on-chip oscillator is not

stopped. Except the Prescaler (only 2048 divided ratio) and

Timer0, all functions are stopped, but the on-chip RAM

and Control registers are held. The port pins out the values

held by their respective port data register, port direction

registers.

The Wake-up Timer mode is activated by execution of

STOP instruction after setting the bit WAKEUP of

CKCTLR to “1”. (This register should be written by

byte operation. If this register is set by bit manipulation

instruction, for example “set1” or “clr1” instruction, it

may be undesired operation)

Note: After STOP instruction, at least two or more NOP in-

struction should be written

Ex)

LDM

TDR0,#0FFH

LDM

TM0,#0001_1011B

LDM

CKCTLR,#0100_1110B

LDM

IRQH,#0

LDM

IRQL,#0

STOP

NOP

In addition, the clock source of timer0 should be select-

ed to 2048 divided ratio. Otherwise, the wake-up func-

tion can not work. And the timer0 can be operated as

16-bit timer with timer1 (refer to timer function). The

period of wake-up function is varied by setting the tim-

er data register 0, TDR0.

Release the Wake-up Timer mode

The exit from Wake-up Timer mode is hardware reset,

Timer0 overflow or external interrupt. Reset re-defines all

the Control registers but does not change the on-chip

RAM. External interrupts and Timer0 overflow allow both

on-chip RAM and Control registers to retain their values.

If I-flag = 1, the normal interrupt response takes place. If I-

flag = 0, the chip will resume execution starting with the

instruction following the STOP instruction. It will not vec-

tor to interrupt service routine (refer to Figure 17-1).

When exit from Wake-up Timer mode by external inter-

rupt or timer0 overflow, the oscillation stabilization time is

not required to normal operation. Because this mode do not

stop the on-chip oscillator shown as Figure 17-4.

Figure 17-4 Wake-up Timer Mode Releasing by External Interrupt or Timer0 Interrupt

STOP Mode

Oscillator

(XIN pin)

STOP Instruction Execution

Stabilization Time

tST = 64mS @4MHz

Internal

Clock

Internal

RESET

Time can not be controlled by software

Wake-up Timer Mode

Oscillator

(XIN pin)

STOP Instruction

Normal Operation

CPU

Clock

Request

Interrupt

Execution

Do not need Stabilization Time

(stop the CPU clock)

HMS87C1102 Datasheet(PDF) 65 Page - Hynix Semiconductor

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