PCF8534A datasheet(28/52 Pages) NXP

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PCF8534A

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Product data sheet

Rev. 6 — 25 July 2011

28 of 52

NXP Semiconductors

PCF8534A

Universal LCD driver for low multiplex rates

8.5 I2C-bus controller

The PCF8534A acts as an I2C-bus slave receiver. It does not initiate I2C-bus transfers or

transmit data to an I2C-bus master receiver. The only data output from the PCF8534A are

the acknowledge signals of the selected devices. Device selection depends on the

I2C-bus slave address, on the transferred command data and on the hardware

subaddress.

In single device applications, the hardware subaddress inputs A0, A1, and A2 are

normally tied to VSS which defines the hardware subaddress 0. In multiple device

applications A0, A1, and A2 are tied to VSS or VDD using a binary coding scheme, so that

no two devices with a common I2C-bus slave address have the same hardware

subaddress.

8.6 Input filters

To enhance noise immunity in electrically adverse environments, RC low-pass filters are

provided on the SDA and SCL lines.

8.7 I2C-bus protocol

Two I2C-bus slave addresses (0111 000 and 0111 001) are used to address the

PCF8534A. The entire I2C-bus slave address byte is shown in Table 16.

The PCF8534A is a write-only device and does not respond to a read access, therefore

bit 0 should always be logic 0. Bit 1 of the slave address byte, that a PCF8534A will

respond to, is defined by the level tied to its SA0 input (VSS for logic 0 and VDD for logic 1).

Having two reserved slave addresses allows the following on the same I2C-bus:

• Up to 16 PCF8534A for large LCD applications

• The use of two types of LCD multiplex drive

The I2C-bus protocol is shown in Figure 18. The sequence is initiated with a START

condition (S) from the I2C-bus master which is followed by one of the available PCF8534A

slave addresses. All PCF8534A with the same SA0 level acknowledge in parallel to the

slave address. All PCF8534A with the alternative SA0 level ignore the whole I2C-bus

transfer.

Table 16.

I2C slave address byte

Slave address

Bit

MSB

LSB

SA0

R/W

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