PCF8534A datasheet(29/52 Pages) NXP

29 / 52 page

PCF8534A

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Product data sheet

Rev. 6 — 25 July 2011

29 of 52

NXP Semiconductors

PCF8534A

Universal LCD driver for low multiplex rates

After acknowledgement, the control byte is sent defining if the next byte is a RAM or

command information. The control byte also defines if the next byte is a control byte or

further RAM or command data (see Figure 19 and Table 17). In this way it is possible to

configure the device and then fill the display RAM with little overhead.

The command bytes and control bytes are also acknowledged by all addressed

PCF8534A connected to the bus.

The display bytes are stored in the display RAM at the address specified by the data

pointer and the subaddress counter. Both data pointer and subaddress counter are

automatically updated.

Fig 18. I2C-bus protocol

EXAMPLES

a) transmit two bytes of RAM data

mgl752

S 0 1110

control byte

slave address

RAM/command byte

RAM DATA

R/W = 0

S 0 1110

0 1

RAM DATA

b) transmit two command bytes

COMMAND

S 0 1110

1 0

COMMAND

c) transmit one command byte and two RAM date bytes

COMMAND

S 0 1110

1 0

RAM DATA

Fig 19. Control byte format

Table 17.

Control byte description

Bit

Symbol

Value

Description

7CO

continue bit

last control byte

control bytes continue

6RS

command register

data register

5 to 0

unused

mgl753

not relevant

210

MSB

LSB

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