80296SA datasheet(15/40 Pages) INTEL

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PRELIMINARY

80296SA COMMERCIAL CHMOS 16-BIT MICROCONTROLLER

RPD

Return from Powerdown

Timing pin for the return-from-powerdown circuit.

If your application uses powerdown mode, connect a capacitor between RPD and

SS if either of the following conditions are true.

• the internal oscillator is the clock source

• the phase-locked loop (PLL) circuitry is enabled (see PLLEN2:1 signal

description)

The capacitor causes a delay (at least 2 ms) that enables the oscillator and PLL

circuitry to stabilize before the internal CPU and peripheral clocks are enabled.

Refer to the “Special Operating Modes” chapter of the

80296SA Microcontroller

User’s Manual for details on selecting the capacitor.

The capacitor is not required if your application uses powerdown mode and if both

of the following conditions are true.

• an external clock input is the clock source

• the phase-locked loop circuitry is disabled

If your application does not use powerdown mode, leave this pin unconnected.

RXD

I/O

Receive Serial Data

In modes 1, 2, and 3, RXD receives serial port input data. In mode 0, it functions as

either an input or an open-drain output for data.

RXD shares a package pin with P2.1.

T1CLK

Timer 1 External Clock

External clock for timer 1. Timer 1 increments (or decrements) on both rising and

falling edges of T1CLK. Also used in conjunction with T1DIR for quadrature

counting mode.

and

External clock for the serial I/O baud-rate generator input (program selectable).

T1CLK shares a package pin with P1.4.

T2CLK

Timer 2 External Clock

External clock for timer 2. Timer 2 increments (or decrements) on both rising and

falling edges of T2CLK. It is also used in conjunction with T2DIR for quadrature

counting mode.

T2CLK shares a package pin with P1.6.

T1DIR

Timer 1 External Direction

External direction (up/down) for timer 1. Timer 1 increments when T1DIR is high and

decrements when it is low. Also used in conjunction with T1CLK for quadrature

counting mode.

T1DIR shares a package pin with P1.5.

T2DIR

Timer 2 External Direction

External direction (up/down) for timer 2. Timer 2 increments when T2DIR is high and

decrements when it is low. It is also used in conjunction with T2CLK for quadrature

counting mode.

T2DIR shares a package pin with P1.7.

Table 4. Signal Descriptions (Continued)

Name

Type

Description

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