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80296SA Datasheet(PDF) 19 Page - Intel Corporation

Part # 80296SA
Description  80296SA COMMERCIAL CHMOS 16-BIT MICROCONTROLLER
PDF  40 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

80296SA Datasheet(HTML) 19 Page - Intel Corporation

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PRELIMINARY
15
80296SA COMMERCIAL CHMOS 16-BIT MICROCONTROLLER
I
PD
Powerdown Mode Current
20
50
µA
V
CC = 5.5 V
(Note 2)
I
STDBY
Standby Mode
8
15
mA
V
CC = 5.5 V
I
LI
Input Leakage Current
(Standard Inputs)
±10
µA
V
SS < VIN < VCC
V
IL
Input Low Voltage (all pins)
–0.5
0.8
V
V
IL
1
Input Low Voltage XTAL1
–0.5
0.3 V
CC
V
V
IH
Input High Voltage
0.2 V
CC +1
V
CC + 0.5
V
V
IH
1
Input High Voltage XTAL1
0.7 V
CC
V
CC + 0.5
V
V
OL
Output Low Voltage (output
configured as complementary)
(Note 3, 4)
0.3
0.45
1.5
V
V
V
I
OL = 200 µA
I
OL = 3.2 mA
I
OL = 7.0 mA
V
OL1
Output Low Voltage on P4.3:0
(output configured as comple-
mentary) (Note 4)
0.45
0.6
V
V
I
OL = 8 mA
I
OL = 15 mA
V
OL2
Output Low Voltage in Reset
on ALE, INST, and NMI
0.45
V
I
OL = 3 µA
V
OL3
Output Low Voltage in Reset
on ONCE pin
0.45
V
I
OL = 30 µA
V
OL4
Output Low Voltage on XTAL2
0.3
0.45
1.5
V
V
V
I
OL = 100 µA
I
OL = 700 µA
I
OL = 3 mA
V
OH
Output High Voltage (output
configured as complementary)
(Note 4)
V
CC – 0.5
V
CC – 0.9
V
CC – 1.5
V
V
V
I
OH = –200 µA
I
OH = –3.2 mA
I
OH = –7.0 mA
V
OH1
Output High Voltage in Reset
(Note 5)
V
CC – 0.7
V
I
OH = –3 µA
Table 6. DC Characteristics Over Specified Operating Conditions (Continued)
Symbol
Parameter
Min
Typical
(Note 1)
Max
Units
Test
Conditions
NOTES:
1.
Typical values are based on a limited number of samples and are not guaranteed. The values listed
are at room temperature with V
CC = 5.0 V.
2.
For temperatures below 100°C, typical is 10 µA.
3.
For all pins except P4.3:0, which have higher drive capability (see V
OL1).
4.
During normal (non-transient) conditions, the following maximum current limits apply for pin groups
and individual pins:
Group
I
OL (mA)
I
OH (mA)
Individual
I
OL (mA)
I
OH (mA)
P1.7:3, P4
40
40
P1, P2, P3
10
10
P2
40
40
P4
18
10
P1.2:0, P3
40
40
5.
For all pins that were weakly pulled high during reset. This excludes ALE, INST, and NMI, which were
weakly pulled low (see V
OL2) and ONCE, which was pulled medium low (see VOL3).
6.
Pin capacitance is not tested. This value is based on design simulations.



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