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AS87196CB Datasheet(PDF) 12 Page - Intel Corporation |
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AS87196CB Datasheet(HTML) 12 Page - Intel Corporation |
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12 / 33 page ![]() 87C196CA87C196CB CCB (2018h Byte) 0PD e ‘‘1’’ Enables Powerdown 1 BW0 e See Table 2WR e ‘‘1’’ e WR BHE‘‘0’’ e WRL WRH 3 ALE e ‘‘1’’ e ALE‘‘0’’ e ADV 4 IRC0 e See Table 5 IRC1 e See Table 6 LOC0 e See Table 7 LOC1 e See Table CCB1 (201Ah Byte) 0 CCR2 e ‘‘1’’ fetch CCB2 (‘‘0’’ for CA) 1 IRC2 e See Table 2 BW1 e See Table 3 WDE e ‘‘0’’ e Always Enabled 41 e Reserved Must Be ‘‘1’’ 50 e Reserved Must Be ‘‘0’’ 6 MEMSEL0 e See Table (‘‘1’’ for CA) 7 MEMSEL1 e See Table (‘‘1’’ for CA) CCB2 (201Ch Byte) (CB Only) 00 e Reserved Must be ‘‘0’’ 1 MODE16 e Select 16-Bit or 24-Bit Mode 2 REMAP e ‘‘0’’Select EPROMCODERAM in Segment 0FFH only ( ‘‘1’’SelectBothSegment0FFHandSegment00H 31 e Reserved Must be ‘‘1’’ 41 e Reserved Must be ‘‘1’’ 51 e Reserved Must be ‘‘1’’ 61 e Reserved Must be ‘‘1’’ 71 e Reserved Must be ‘‘1’’ LOC1 LOC0 Function 0 0 Read and Write Protected 0 1 Write Protected Only 1 0 Read Protected Only 1 1 No Protection MSEL1 MSEL0 ‘‘CB’’ Bus Timing Mode 0 0 Mode 0 (1-Wait KR) 0 1 Reserved Must Not Be Used 1 0 Reserved Must Not Be Used 1 1 Mode 3 (KR) Mode 0 Designed to be similar to the 87C196KR bus (1-Wait KR) timing with 1 automatic wait state See AC Timings section for actual timings data Mode 3 (KR) Designed to be similar to the 87C196KR bus timing See AC Timings section for actual timings data IRC2 IRC1 IRC0 Max Wait States 0 0 0 Zero Wait States 1 0 0 1 Wait State 1 0 1 2 Wait States 1 1 0 3 Wait States 1 1 1 INFINITE BW1 BW0 Bus Width 0 0 ILLEGAL 0 1 16-Bit Only 1 0 8-Bit Only 1 1 BW Pin Controlled 12 |
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