AS87196CB datasheet(33/33 Pages) INTEL

33 / 33 page

87C196CA87C196CB

DATA SHEET REVISION HISTORY

This is the -003 revision of the 87C196CACB data

sheet The following differences exist between the

-002 version and the -003 revision

1 The data sheet has been revised to ADVANCE

from PRELIMINARY indicaitng the specifica-

tions have been verified through electrical tests

2 The 87C196CB 100-ld QFP package and device

pinout has been added to the data sheet

3 The 87C196CB 100-ld QFP device supports up

the 16 Mbyte of linear address space

4 The package thermal characteristics for the

PLCC packages was added to the data sheet

for the CB iJA e 350 CW iJC e 110 CW

For the CA

iJA e 365 CW and iJA e

100 CW

5 The AN87C196CB pin package diagram was

corrected to show EA

as opposed to EA

6 The

REMAP

bit

funciton

for

CCB2

was

corrected Setting this bit to 0 selects EPROM

CODERAM in segment 0FFH only Setting this

bit to 1 selects both segment 0FFH and segment

00H

7 tRLAZ has been changed to 5 ns from 20 ns

8 tWLWH for the CA has been changed to tOSC

20 from tOSC b 30

9 tCLGX has been changed to 0 ns min from tOSC

46 max

10 Timing specifications for the SSIO are now add-

ed These timings are currently guaranteed by

design

11 Added frequency designation to family nomen-

clature Figure 2

This is the -002 revision of the 87C196CA data

sheet The following difference exist between the

-001 version and the -002 revision

1 This data sheet now includes the specifications

for the 87C196CB as well as the 87C196CA

2 ABSOLUTE MAXIMUM RATINGS have been

added

3 Maximum Frequency has been increased to

20 MHz

4 Maximum ICC has been increased from 75 mA

to 100 mA for the CB 90 mA for the CA

5 Idle Mode current has been increased to 35 mA

from 30 mA for the CB 40 mA for the CA

6 Input leakage current for Port 0 (ILI1) was de-

creased to 15 mA from 20 mA for the CA

7 The electrical characteristics for the CAN mod-

ule were removed The electrical characteristics

for TXCAN and RXCAN are identical to standard

port pins

8 tOSC (1freq) was modified to reflect 20 Mhz tim-

ings

9 tOFD (Oscillator Fail Detect Specification) for

clock failure to RESET pin pulled low was added

to the data sheet (4 ms min 40 ms max)

10 tWHQX has been increased to tOSC b 25 ns min

from tOSC b 30 ns min

11 tRXDX has been replaced by tRHDX tRLAZ has

been increased to 20 ns max from 5 ns max

12 IPP programming supply current has been in-

creased to 200 mA from 100 mA

13 tCONV Conversion time for 10 bit AD conver-

sions has been decreased to reflect 20 Mhz op-

eration

14 RRST was added for the 87C196CA (min e 6

kX max e 65 kX

15 tCLLH minmax parameters switched to accu-

rately reflect this timing parameter

16 tRLCL Separate timings for the 87C196CA vs

87C196CB tRLCL for the CB is min b8 ns max

20 ns For the CA tRLCL min a4 nsmax

30 ns

17 tRLRH changed to TOSC b 10 ns from TOSC

5 ns

18 tAVGV added for the 87C196CB

19 tLLGV added for the 87C196CB

20 tCLGX added for the 87C196CB

21 tRLDV Separate timings for 87C196CB tRLDV

max e TOSC b 30 ns For the 87C196CA

tRLDV max e TOSC b 22 ns

22 HOLDHOLDA

timings

added

for

the

87C196CB

23 Slave Port Timings added for the 87C196CB

24 Separate

specifications

for

tPLPH for the

87C196CB tPLPH min e 100 TOSC For the

87C196CA tPLPH min e 50 TOSC

25 Separate

specificatons

for

tPLDV for the

87C196CB tPLDV min e 100 TOSC for the

87C196CA tPLDV min e 50 TOSC

26 8-Bit mode AD characteristics added

AS87196CB Datasheet(PDF) 33 Page - Intel Corporation

AS87196CB Datasheet(HTML) 33 Page - Intel Corporation

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