AS87196CB datasheet(32/33 Pages) INTEL

32 / 33 page

87C196CA87C196CB

87C196CA ERRATA

This data sheet was published prior to first available

silicon Consequently there is no known errata at

this time

87C196CA DESIGN CONSIDERATIONS

1 PORT0

On the 87C196CA the analog inputs for P00 and

P01 have been multiplexed and tied to VREF There-

fore initiating an analog conversion on ACH0 or

ACH1 will result in a value equal to full scale (3FFh)

On the CA the digital inputs for these two channels

are tied to ground therefore reading P00 or P01

will result in a digital ‘‘0’’

2 PORT1

On the 87C196CA P14 P15 P16 and P17 have

been removed from the device and is unavailable to

the programmer Corresponding bits in the port reg-

isters have been ‘‘hard-wired’’ to provide the follow-

ing results when read

When Read

PINx

(x e 4567)

REGx

(x e 4567)

DIRx

(x e 4567)

MODEx

(x e 4567)

Writing to these bits will have no effect

3 PORT2

On the 87C196CA P23 and P25 have been re-

moved from the device and are not available to the

programmer Corresponding bits in the port registers

have been ‘‘hard-wired’’ to provide the following re-

sults when read

When Read

PINx

(x e 35)

REGx

(x e 35)

DIRx

(x e 35)

MODEx

(x e 35)

Writing to these bits will have no effect

4 PORT5

On the 87C196CA P51 and P57 have been re-

moved from the device and are not available to the

programmer Corresponding bits in the port registers

have been ‘‘hard-wired’’ to provide the following re-

sults when read

When Read

PINx

(x e 17)

REGx

(x e 17)

DIRx

(x e 17)

MODEx

(x e 1)

MODEx

(x e 7)

Writing to these bits will have no effect

5 PORT6

On the 87C196CA P62 and P63 have been re-

moved from the device and are not available to the

programmer Corresponding bits in the port registers

have been ‘‘hard-wired’’ to provide the following re-

sults when read

When Read

PINx

(x e 23)

REGx

(x e 23)

DIRx

(x e 23)

MODEx

(x e 23)

Writing to these bits will have no effect

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