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AD9983A Datasheet(PDF) 6 Page - Analog Devices |
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AD9983A Datasheet(HTML) 6 Page - Analog Devices |
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6 / 44 page ![]() AD9983A Rev. 0 | Page 6 of 44 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 2 BAIN0 3 GND 4 BAIN1 7 GND 6 GAIN0 5 VD (1.8V) 1 VD (1.8V) 8 SOGIN0 9 VD (1.8V) 10 GAIN1 12 SOGIN1 13 VD (1.8V) 14 RAIN0 15 GND 16 RAIN1 17 PWRDN 18 REFLO 19 NC 20 REFHI 11 GND 59 58 57 54 55 56 60 53 52 BLUE 2 BLUE 3 BLUE 4 BLUE 7 BLUE 6 BLUE 5 BLUE 1 GND VDD (3.3V) 51 NC 49 GREEN 0 48 GREEN 1 47 GREEN 2 46 GREEN 3 45 GREEN 4 44 GREEN 5 43 GREEN 6 42 GREEN 7 41 DAVDD (1.8V) 50 NC 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 AD9983A TOP VIEW (Not to Scale) NC = NO CONNECT PIN 1 INDICATOR Figure 2. 80-Lead LQFP Pin Configuration Table 4. Complete Pinout List Pin Type Pin Number Mnemonic Function Value Inputs 14 RAIN0 Channel 0 Analog Input for Converter R 0.0 V to 1.0 V 16 RAIN1 Channel 1 Analog Input for Converter R 0.0 V to 1.0 V 6 GAIN0 Channel 0 Analog Input for Converter G 0.0 V to 1.0 V 10 GAIN1 Channel 1 Analog Input for Converter G 0.0 V to 1.0 V 2 BAIN0 Channel 0 Analog Input for Converter B 0.0 V to 1.0 V 4 BAIN1 Channel 1 Analog Input for Converter B 0.0 V to 1.0 V 70 HSYNC0 Horizontal Sync Input for Channel 0 3.3 V CMOS 68 HSYNC1 Horizontal Sync Input for Channel 1 3.3 V CMOS 71 VSYNC0 Vertical Sync Input for Channel 0 3.3 V CMOS 69 VSYNC1 Vertical Sync Input for Channel 1 3.3 V CMOS 8 SOGIN0 Input for Sync-on-Green Channel 0 0.0 V to 1.0 V 12 SOGIN1 Input for Sync-on-Green Channel 1 0.0 V to 1.0 V 721 EXTCK External Clock Input 3.3 V CMOS 73 CLAMP External Clamp Input Signal 3.3 V CMOS 721 COAST External PLL Coast Signal Input 3.3 V CMOS 17 PWRDN Power-Down Control 3.3 V CMOS |
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