AD9983A datasheet(2/44 Pages) AD

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AD9983A

Rev. 0 | Page 2 of 44

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

Functional Block Diagram .............................................................. 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Analog Interface Characteristics ................................................ 3

Absolute Maximum Ratings............................................................ 5

Explanation of Test Levels ........................................................... 5

Thermal Resistance ...................................................................... 5

ESD Caution.................................................................................. 5

Pin Configuration and Function Descriptions............................. 6

Theory of Operation ...................................................................... 10

Digital Inputs .............................................................................. 10

Analog Input Signal Handling.................................................. 10

Hsync and Vsync Inputs............................................................ 10

Serial Control Port ..................................................................... 10

Output Signal Handling............................................................. 10

Clamping ..................................................................................... 10

Gain and Offset Control............................................................ 11

Sync-on-Green............................................................................ 12

Reference Bypassing................................................................... 12

Clock Generation ....................................................................... 13

Sync Processing........................................................................... 15

Power Management.................................................................... 18

Timing Diagrams........................................................................ 18

Hsync Timing ............................................................................. 19

Coast Timing............................................................................... 20

Output Formatter ....................................................................... 20

2-Wire Serial Control Port ............................................................ 21

Data Transfer via Serial Interface............................................. 21

2-Wire Serial Register Map ........................................................... 23

2-Wire Serial Control Registers.................................................... 29

Chip Identification ..................................................................... 29

PLL Divider Control .................................................................. 29

Clock Generator Control .......................................................... 29

Phase Adjust................................................................................ 29

Input Gain ................................................................................... 30

Input Offset ................................................................................. 30

Hsync Controls ........................................................................... 30

Vsync Controls ........................................................................... 31

Coast and Clamp Controls........................................................ 32

SOG Control ............................................................................... 33

Input and Power Control........................................................... 34

Output Control ........................................................................... 35

Sync Processing .......................................................................... 36

Detection Status.......................................................................... 36

Polarity Status ............................................................................. 37

Hsync Count ............................................................................... 37

Test Registers............................................................................... 37

PCB Layout Recommendations.................................................... 39

Analog Interface Inputs ............................................................. 39

Outputs (Both Data and Clocks).............................................. 40

Digital Inputs .............................................................................. 40

Outline Dimensions ....................................................................... 41

Ordering Guide .......................................................................... 41

REVISION HISTORY

5/07—Revision 0: Initial Version

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