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ISL6590DR Datasheet(PDF) 11 Page - Intersil Corporation

Part # ISL6590DR
Description  Digital Multi-Phase PWM Controller for Core-Voltage Regulation
PDF  24 Pages
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL6590DR Datasheet(HTML) 11 Page - Intersil Corporation

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the status register which then allows accesses to the Non-
Volatile Memory map.
Write-Through Cycles
During startup and local register loading, any incoming
writecycles to the Non-Volatile Memory will be held off until
start up and configuration is complete. During normal
operation, writes to the Non-Volatile Memory shall be
extended until such time that the data is both written to and
read back from the external EEPROM.
ISL6590 Data Write Timing
ISL6590 Data Read Timing
TABLE 6. EEPROM DATA READ TIMING
TIMING NAME
PARAMETER
MIN
UNITS
Data Setup
tDSU
20
ns
Data Hold
tDH
20
ns
TABLE 7. EEPROM TIMING
TIMING NAME
PARAMETER
TYPICAL
UNITS
CS to MCLK delay
tCSSU
480
ns
Data Setup
tDSU
240
ns
Data Hold
tDH
240
ns
Clock Period
tP
480
ns
MCLK to CS delay
tCSH
720
ns
FIGURE 4. EEPROM DATA READ TIMING
FIGURE 5. EEPROM DATA WRITE TIMING
TABLE 8. DATA WRITE TIMING
TIMING NAME
PARAMETER
TYPICAL
UNITS
Data Setup
tDSU
45
ns
Data Hold
tDH
15
ns
Kick Hold
tKH
15
ns
Stop Hold
tSPH
15
ns
SCLK Period
tp
62.5
ns
TABLE 9. DATA READ TIMING
TIMING NAME
PARAMETER
TYPICAL
UNITS
Data Setup
tDSU
52
ns
Data Hold
tDH
14
ns
FIGURE 6. ISL6590 DATA WRITE TIMING
tDSU
tDH
tKH
t
SPH
Tp
SCLK
SDATA
FIGURE 7. DATA READ TIMING
ISL6590



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