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ISL6590DR Datasheet(PDF) 17 Page - Intersil Corporation

Part # ISL6590DR
Description  Digital Multi-Phase PWM Controller for Core-Voltage Regulation
PDF  24 Pages
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL6590DR Datasheet(HTML) 17 Page - Intersil Corporation

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17
Compensation Methodology
Due to the user interface software interface, it is very easy to
change the frequency compensation and see the resulting
performance on a scope or network analyzer. Transient
response is viewed by applying a transient load and
monitoring the output voltage with a scope. Frequency
response is viewed by placing a small resistor between the
output and the feed back network, applying a small sine
wave at the input to the feed back network and measuring
the amplitude and phase shift of the resulting sine wave on
the output. Sweeping the frequency produces plots similar
to those above.
Frequency Domain
It is recommended to place the first zero (FZ1) at the
resonant frequency of the output inductors and capacitors (F
= 1/(2
π√LC) = 10kHz in this case). Then increase F
Z2 and
FP0 to maximize DC gain and the frequency at which gain
drops below 0dB while keeping the phase margin above 60
degrees. Phase Margin is the difference between 180
degrees and the phase shift of the loop at the frequency
where the gain drops below 0dB (cross over frequency). If
the loops phase shift reaches 180 degrees and has gain
equal to or greater than 0dB, it acts as positive feed back
and the loop will oscillate. Even if the loops phase shift is
slightly below 180 degrees at the cross over frequency, the
loop will respond to transients with overshoot and ringing.
Loop phase shift between 90 and 120 degrees at the cross
over frequency (Phase margin = 60 to 90 degrees) results in
little or no over shoot and ringing. Large phase margins
(>90 degrees) result in slower transient response.
Time Domain
It is recommended to place the first zero (FZ1) at the
resonant frequency of the output inductors and capacitors (F
= 1/(2
π√LC = 10kHz in this case). Then increase FZ2 and
FP0 to minimize response time over (under) shoot and
ringing. The first microseconds of transient response are
primarily dependant on the ESR and ESL of the output
capacitors. After the affects of ESL and ESR pass the loop
must control the response.
User Interface Software
The ISL6590 controller and the ISL6580 intelligent power
stage have programmable values that can be changed using
the User Interface Software. The loop configuration and
system performance is adjusted using the software. The use
of the software allows the engineer to evaluate the system
performance without having to physically change
components on the board. Primarion PowerCode user
interface software (provided by Intersil and our partner
Primarion).
Below are screen shots showing data entry points, pull down
menus, buttons for help and a tutorial. The user interface
software allows the designer to adjust the load line,
frequency response, ATR and protection modes.
FIGURE 20. PID COMPENSATOR FREQUENCY RESPONSE
0
10
20
30
40
50
60
1
10
100
1000
10000
Frequency (in KHz)
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
Compensation
Phase
FIGURE 21. FREQUENCY RESPONSE OF THE CLOSED LOOP
-120
-100
-80
-60
-40
-20
0
20
40
60
1
10
100
1000
10000
Frequency (in KHz)
-50
0
50
100
150
200
250
300
350
400
Loop
Phase
FIGURE 22. TYPICAL RESPONSE TO A LOAD TRANSIENT
ISL6590



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