AN2871

On-chip voltage regulator (VREG)

Doc ID 15304 Rev 3

11/25

External transistor power dissipation

The power dissipation required by the bypass transistor is dependent upon the voltage drop

across it, the core current and the selected supply range.

The worst case power dissipation of the ballast transistor is with a 5 V supply. Assuming the

CPU draws 100 mA (please check figure according to your configuration in the latest

SPC560Pxx/SPC56APxx datasheet), the worst case voltage drop with 5 V +10% supply is

4.35 V (that is, 5.5 V

 1.15 V = 4.35 V). This leads to about 0.435 W of power dissipation.

Ballast transistor junction temperature

The ballast transistor maximum junction temperature is typically 150 °C, although in some

transistors it may be as high as 165 °C.

Depending on the maximum ambient temperature, the ballast transistor may have a limited

allowed temperature rise and thus requires adequate heatsinking. Thermal characteristics

of the board and heatsink are required for this calculation.

Ballast transistor VCEsat

To reduce the power dissipation in the transistor, it is permissible to add a series resistor that

will drop the collector voltage. If this is used, the saturation voltage becomes significant; the

transistor must remain out of saturation with the minimum expected supply (5.0 V or 3.3 V)

and the maximum expected Vcore rail (that is, 1.32 V).

Ballast transistor inductance

The distance from the ballast transistor's heatsink rail to the microcontroller will lead to

inductance in the system (the greater the distance, the higher the inductance). The location

of the transistor will also affect the inductance, due to the lengths of the 1.2 V traces and of

the BCTRL signal. Those inductances will reduce the phase margin. It is recommended that

the inductance on BCTRL and on 1.2 V is kept below 15 nH.

Due to variations in board type, specific details on trace length specification cannot be

provided; consequently, inductance values have been given.

Calculation examples

Note:

The following examples demonstrate how ballast transistors can be selected and how chip

junction temperature can be estimated. The data used in the examples are fictional and

should not be taken as specifications for particular systems. For specific calculations, please

refer to the device datasheet.