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AN2451 Datasheet(PDF) 37 Page - STMicroelectronics

Part # AN2451
Description  ST7540 FSK powerline transceiver
PDF  55 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN2451 Datasheet(HTML) 37 Page - STMicroelectronics

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AN2451
Board description
Doc ID 12791 Rev 3
37/55
In the input stage, an EMI filter is implemented (C1-L2 plus C3-L3-C2) for both differential and
common mode noise, in order to fit the requested standard.
The blocking diode D2 and the clamping network (R2-C4) clamp the peak of the leakage
inductance voltage spike, assuring reliable operation of the VIPer12AS-E. D2 must be very
fast recovery and very fast turn-on to avoid additional drain overvoltage. The clamp
capacitor C4 must be low-loss (with polypropylene or polystyrene film dielectric) to reduce
power dissipation and prevent overheating, since it is charged with high peak currents by the
energy stored in the leakage inductance.
A Leading Edge Blanking (LEB) circuit for leakage inductance spikes filtering has also been
implemented (Q1 - C5 - R3). It blanks the spike appearing at the leading edges of the voltage
generated by the self-supply winding, greatly improving short circuit behavior.
The output rectifiers have been selected to take the maximum reverse voltage and the RMS
secondary current into account. A STPS1H100 Power Schottky rectifier has been chosen
for this purpose.
A LC filter has been added on the output (consisting of L4, C9 and C29) in order to filter the
high frequency ripple without increasing the output capacitors size or quality.
The transformer used for this application has three windings, since one of them is needed to
supply the VIPer12AS-E. The primary inductance has been chosen as 2.7 mH and the
reflected voltage has been set to 80 V.
A layer type has been chosen with EF12.6 or E13/7/4 core.
The characteristics are listed in Table 11.
Some significant waveforms are represented in the following figures. Figure 33 and
Figure 34 show typical waveforms in both open-load and full-load conditions.
Table 10.
SMPS specifications
Parameter
Value
Input voltage range, Vin
85-265
Vac
Output voltage, VOUT
12 V
±10%
Peak output current, IOUT(MAX)
500 mA
Table 11.
SMPS transformer specifications
Parameter
Value
Core geometry
SRW12.6ES or E13/7/4
Primary inductance
2.7 mH±10%
Leakage inductance
180
μH max
NP
224 turns – 0.1 mm
NAUX
39 turns – 0.1 mm
NSEC
31 turns – 0.2 mm (TEX-E wire)
Withstanding voltage
4 kVRMS



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