UPD178024GC datasheet(24/56 Pages) NEC

24 / 56 page

µPD178023, 178024

Data Sheet U14126EJ1V0DS00

3.6 Serial Interface

The

µPD178023 and 178024 have three serial interface channels.

• Serial interface (IIC0)

• Serial interface (SIO3)

• Serial interface (UART0)

Figure 3-8. Block Diagram of Serial Interface (IIC0)

Internal bus

IIC status register 0

(IICS0)

IIC control register 0

(IICC0)

Slave address

Noise elimination

circuit

Noise elimination

circuit

Coincidence

signal

IIC shift register 0

(IIC0)

SO0 latch

IICE0

SET

CLEAR

CL01,

CL00

SDA0/P76

SCL0/P77

N-ch open-

drain output

Data hold

time correction

circuit

ACK detection

circuit

Wake up control

circuit

ACK detection circuit

Stop condition

detection circuit

Serial clock counter

Interrupt request

signal generator

Serial clock control circuit

Serial clock wait

control circuit

Prescaler

INTIIC0

CLD0

IIC transfer clock select

Internal bus

LREL0 WREL0 SPIE0 WTIM0 ACKE0

STT0

SPT0

MSTS0 ALD0 EXC0

COI0

TRC0 ACKD0 STD0 SPD0

Start condition

detection circuit

DAD0 SMC0 DFC0 CL01 CL00

UPD178024GC Datasheet(PDF) 24 Page - NEC

UPD178024GC Datasheet(HTML) 24 Page - NEC

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