LT3469

5

3469f

OPERATIO

designed to drive capacitive loads. Input common mode

range extends from 10V to ground. The output current is

proportional to the voltage difference across the input

terminals. When the output voltage has settled, the input

terminals will be at the same voltage; supply current of the

amplifier will be low and power dissipation will be low. If

presented with an input differential, however, the output

current can increase significantly, up to the maximum

output current (typically 40mA). The output voltage slew

rate is determined by the maximum output current and the

output capacitance, and can be quite high. With a 10nF

load, the output slew rate will typically be 4V/

µs. The

present for stable operation. The gain capacitance product

of the amplifier must be at least 50nF. For example, if the

amplifier is operated in a gain of 10 configuration, a

minimum capacitance of 5nF is necessary. In a gain of 20

configuration, a minimum of 2.5nF is necessary. Closed

loop –3dB bandwidth is set by the output capacitance.

Typical closed loop bandwidth is approximately:

g

AC

m

V

OUT

2

π ••

For example, an amplifier in a gain of 10 configuration with

10nF of output capacitance will have a closed loop –3dB

bandwidth of approximately 300kHz. Figure 3 shows typi-

cal bandwidth of a gain of 10 configuration per output

capacitance.

In applications where negative phase contributions below

crossover frequency must be minimized, a phase boost

capacitor can be added, as shown in Figure 4. Larger val-

phase contribution, however, the amplifier phase margin

will be reduced. For an amplifier phase margin of approxi-

mately 55

C

CR

R

gR

R

BOOST

OUT

m

=

+

()

()

12 1

12

/

||

scribed will lead to nearly zero closed-loop negative phase

200nF. The phase boost capacitor should not be used if

The gain capacitance product should therefore be higher

than 100nF if a phase boost capacitor is used.

Switching Regulator

The LT3469 uses a constant frequency, current mode

control scheme to provide excellent line and load regula-

tion. Operation can be best understood by referring to the

Block Diagram in Figure 1. The switch controller sets the

peak current in Q1 proportional to its input. The input to the

switch controller is set by the error amplifier, A1, and is

Figure 2. Slew Rate vs Capacitance

Figure 3. Closed Loop –3dB Bandwidth

vs Capacitance in a Gain of 10 Configuration

CAPACITANCE (nF)

2

0.1

1

10

100

20

200

3469 F02

CAPACITANCE (nF)

2

10

100

1000

20

200

3469 F03

WITH PHASE

BOOST CAPACITOR

WITHOUT PHASE

BOOST CAPACITOR