LT3489

4

3489f

PI FU CTIO S

BLOCK DIAGRA

sation network to this pin, or use the internal compensation

FB (Pin 2): Feedback Pin. Reference voltage is 1.235V.

Connect resistive divider tap here. Minimize the trace area at

SHDN (Pin 3): Shutdown Pin. Tie to 2V or more to enable

device. Ground to shut down. Do not float this pin.

GND (Pin 4): Ground. Tie directly to local ground plane.

SW (Pin 5): Switch Pin. This is the collector of the internal

NPN power switch. Minimize the metal trace area connected

to this pin to minimize EMI.

COMP (Pin 7): Internal Compensation Pin. Provides an

for internal compensation. Tie to GND if not in use.

SS (Pin 8): Soft-Start Pin. Place a soft-start capacitor here.

Upon start-up, 10μA of current charges the capacitor to

1.8V. Use a larger capacitor for slower start-up. Leave

floating if not in use.

Exposed Pad (Pin 9): Ground. Must be soldered to

PCB.

Σ

–

+

A2

FB

SHDN

SHUTDOWN

DRIVER

Q1

0.01

Ω

100k

125pF

SW

GND

COMPARATOR

5

1

COMP

4

S

RQ

RAMP

GENERATOR

2MHz

OSCILLATOR

–

+

2

3

1.235V

REFERENCE

6

SS

+

8

7

R1 (EXTERNAL)

FB

R2 (EXTERNAL)

A1

GND

9

3489 F01

Figure 1. Block Diagram