AN2454

Fine tuning of the application

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Considering that the power supply is low, the transistor works without a heat sink, and

flyback converter design. It in turn affects:

●

Parasitic transformer inter-winding capacitance.

●

Layout parasitic capacitance.

Care is needed when designing the layout parastic capacitance and building the

transformer.

4

Fine tuning of the application

Once the design is completed, application parameters and performance are fine tuned by

bench verification.

Bench verification of the current demo board has highlighted that the chosen frequency and

the high input voltage correspond with a very short conductance time. This may cause some

instability or malfunctioning, even with optimized transformer parasitic elements. According

1200 V is:

Equation 11

series with the ESBT as shown in Figure 3 and has a current sensing function. The current

waveform often has a large spike at its leading edge (see Figure 4). This is caused by the

transient spike. The RC time constant should approximately equal the current spike

duration, which is usually a few hundred nanoseconds. Values used in the demo board are:

●

●

Figure 3.

Current sense circuit (a) and waveform of sense resistor ( b)

T

onmaxvbVdcmax

L

V

dcmax

-------------------

1

µs

≈

=

@

@

Rs

ESBT

Cs

OUT

6

ISENSE

3

VCC

FB

COMP

VREF

RT/CT

UC3845

Rcs

Vcs

Vrs

Vrs

Spike

(a)

(b)