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UM1839 Datasheet(PDF) 10 Page - STMicroelectronics |
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UM1839 Datasheet(HTML) 10 Page - STMicroelectronics |
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10 / 18 page ![]() Getting started UM1839 10/18 DocID027168 Rev 1 3 Getting started 3.1 Using EVALSTGAP1S in standalone mode The STGAP1S device can work also without SPI programming using the device default values. 3.1.1 Check list EVALSTGAP1S board Two power supplies (VDD and VH supply voltage) Power supply for negative gate driving voltage VL is optional PWM function generator 3.1.2 EVALSTGAP1S board setup example 1. VDD = 3.3 V or 5 V from external power supply (J6 connector) 2. VH from external power supply (J2 connector) 3. VL = GNDISO (JP5 closed) 4. PWM input signals can be applied to J3 connector (IN-, IN+) If you have only one PWM signal available: – To have gate output in phase with input command: PWM on IN+ and IN- = GND – To have gate output out of phase with input command: PWM on IN- and IN+ = VDD 3.1.3 EVALSTGAP1S board in standalone mode 1. Connect the power supply to the EVALSTGAP1S VDD (J6 connector) and turn it on. The DIAG1 LED (DL2) on the EVALSTGAP1S is turned on. The status of the DIAG2 depends on the voltage level forced on the IN- pin. 2. Connect the power supply to the EVALSTGAP1S VH (J2 connector) and turn it on. 3. Set the SD pin low for at least 105 µs to clear the fault (J3 connector). 4. Set the SD pin to the 'High' logic level (which depends on VDD value): the DIAG1 LED (DL2) is switched off. 5. The device outputs will now follow the input signals coming from IN+ and IN-. |
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