Modified features

AN2169

12/33

The bit 6 of ADCON register, reserved in the previous ST10 devices, has now the function of

enabling or disabling the ADC. By default this bit is cleared and the ST10F276 is compatible

with the ST10F168.

Additional analog channels on Port1

A new multiplexer selects between up to 16 or 8 analog input channels (alternate functions of

Port 5 and Port1). The selection of the Port1 or Port5 as input of the ADC is made via bit

ADCMUX, bit 0 of XMISC register.

XMISC (EB46h)

XREG

Reset Value: --00h

By default the multiplexer selects the Port5, so there is no impact on the software with regard to

a ST10F168 implementation.

1.6

PLL and on-chip main oscillator

In order to reach the new frequency range, the PLL multiplication factors have been changed.

Table 5.

ST10F168 vs ST10F276 PLL ratio

15

14

13

12

11

10

987654

3210

-----

-------

VREG

OFF

CANC

K2

CANP

AR

ADCM

UX

rw

rw

rw

rw

Bit

Function

0

ADCMUX

0: default configuration, analog inputs on port P5.y can be converted

1: analog inputs on port P1.z can be converted, only 8 channel can be managed

P0.15-13

(P0H.7-5)

ST10F168

ST10F276

ST10F276

ST10F276

PLL factor

PLL factor

Input Frequency Range

(MHz)

Low Power

Oscillator

Wide Swing

Oscillator

Notes

111

4 to 8

4 to 8

Default configuration

110

5.3 to 8

5.3 to 10.6

101

4 to 8

4 to 8

100

6.4 to 8

6.4 to 12

011

1 to 64

1 to 64

Direct Drive

010

4 to 6.4

4 to 6.4