AN2169

New registers

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4

New registers

This section presents new registers that have to be considered when porting an application

running on the ST10F168 onto the ST10F276.

4.1

XPERCON register

The ST10F276 has a new register named XPERCON that allows the XBUS peripherals to be

separately selected for being visible to the user by means of corresponding bits. If not selected

(not activated with a bit of XPERCON) before the XPEN bit in SYSCON is set, the

corresponding address space, port pins and interrupts are not occupied by the peripheral, and

thus this peripheral is not visible and not available.

ST10F276: XPERCON (F024h / 12h)

SFR

Reset Value: -005h

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

--

--

-

XMISC

EN

XI2C

EN

XSSC

EN

XASC

EN

XPWM

EN

XFLASH

EN

RTC

EN

XRAM2

EN

XRAM1

EN

CAN2

EN

CAN1

EN

RW

RW

RW

RW

RW

RW

RW

RW

RW

RW

RW

Bit

Function

15:11

Reserved

10

XMISCEN: XBUS Additional Features Enable Bit

0: Accesses to the Additional Miscellaneous Features is disabled.

1: The Additional Features are enabled and can be accessed.

9

XI2CEN: XI 2 C Enable Bit

0: Accesses to the on-chip XI 2 C are disabled, external access performed.

1: The on-chip XI 2 C is enabled and can be accessed.

8

XSSCEN: XSSC Enable Bit

0: Accesses to the on-chip XSSC are disabled, external access performed.

1: The on-chip XSSC is enabled and can be accessed.

7

XASCEN: XASC Enable Bit

0: Accesses to the on-chip XASC are disabled, external access performed.

1: The on-chip XASC is enabled and can be accessed.

6

XPWMEN: XPWM Enable

0: Accesses to the on-chip XPWM module are disabled, external access performed.

1: The on-chip XPWM module is enabled and can be accessed.

5

XXFLASHEN: FLASH Enable Bit

0: Accesses to the on-chip XFLASH are disabled, external access performed.

1: The on-chip XFLASH is enabled and can be accessed.