Modified registers

AN2169

20/33

Note: 1 More than one RESET indication flag may be set. After EINIT, all flags are cleared.

2 Power-on is detected when a rising edge from VDD=0 V to VDD<2.0 V is recognized.

3.1.1

Hardware impact

None.

3.1.2

Software impact

None if the ST10F168 software was masking the non-implemented bits.

3.2

PICON register

Some bits have been added, and some suppressed in this register for the ST10F276.

The port Input Control register PICON is used to select between TTL and CMOS-like input

thresholds.

The CMOS-like input thresholds are defined above the TTL levels and feature a defined

hysteresis to prevent the inputs from toggling while the respective input signal level is near the

thresholds.

On the ST10F168, this functionality is available for pins of port 2, port3, port7 and port8 and the

hysteresis level is 300 mV for CMOS levels.

In the ST10F276, this functionality has been added for the pins of port 4 and port 6.

Moreover the default hysteresis is now 500 mV for TTL levels and is 800 mV for CMOS levels.

ST10F168: PICON (F1C4h /E2h)

ESFR

Reset Value: 0000h

ST10F276: PICON (F1C4h / E2h)

ESFR

1

WDTR: Watchdog Timer Reset Indication Flag

Set by the watchdog timer on an overflow.

Cleared by a hardware reset or by the SRVWDT instruction.

0

WDTIN: Watchdog Timer Input Frequency Selection

0:Input frequency is Fcpu /2

1:Input frequency is Fcpu /128

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

P8LOUT

P7LOUT

-

P3HOUT

P3LOUT

P2HOUT

P2LOUT

P8LIN

P7LIN

P3HIN

P3LIN

P2HIN

P2LIN

RW

RW

RW

RW

RW

RW

RW

RW

RW

RW

RW

RW

Bit

Function