AN2169 datasheet(27/33 Pages) STMICROELECTRONICS

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AN2169

New registers

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4.5

XMISC register

ST10F276: XMISC (EB46h)

XREG

Reset Value: 0000h

4.5.1

Hardware impact

None.

4.5.2

Software impact

None.

4.6

Emulation dedicated registers

A set of additional four registers are implemented for emulation purpose only. Similarly to

XPEREMU, they are write only registers.

XEMU0 (00’EB76h)

XEMU1 (00’EB78h)

XEMU2 (00’EB7Ah)

XEMU3 (00’EB7Ch)

9876

----

VREG

OFF

CAN

CK2

CAN

PAR

ADC

MUX

----

Bit

Function

15:4

Reserved

VREGOFF: Main Voltage Regulator disable in Power-Down mode

0: On-chip Main Regulator is held active when Power-Down mode is entered

1: On-chip Main Regulator is turned off when Power-Down mode is entered

CANCK2: CAN Clock divider by 2 disable

0: Clock provided to CAN modules is CPU clock divided by 2 (mandatory when FCPU is

higher than 40MHz)

1: Clock provided to CAN modules is directly CPU clock

CANPAR: CAN Parallel Mode Selection

0: CAN2 is mapped on P4.4/P4.7, while CAN1 is mapped on P4.5/P4.6

1: CAN1 and CAN2 are mapped in parallel on P4.5/P4.6. This is effective only if both

CAN1 and CAN2 are enabled through setting of bits CAN1EN and CAN2EN in

XPERCON register. If CAN1 is disabled, CAN2 remains on P4.4/P4.7 even if bit CANPAR

is set.

ADCMUX: Port1L ADC Channels Enable

0: Analog inputs on port P5.y can be converted (default configuration)

1: Analog inputs on port P1.z can be converted. Only 8 channels can be managed

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