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UM0805 Datasheet(PDF) 16 Page - STMicroelectronics |
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UM0805 Datasheet(HTML) 16 Page - STMicroelectronics |
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16 / 29 page ![]() Switch settings UM0805 16/29 Doc ID 16304 Rev 3 9 Switch settings 9.1 Switch 1 (SoC functional configuration) Table 7. Switch 1 (SoC functional configuration) Bit Description 1 Test0 – see Debug configuration below 2 Test1 – see Debug configuration below 3 Test2 – see Debug configuration below 4 Test3 – see Functional configuration below 5 Test4 – see Functional configuration below 6 Test5 – see Functional configuration below Table 8. Switch 1 (debug configuration) Test bit Debug configuration 321 0 0 0 Normal Mode (No debug enabled) 0 0 1 ARM1 JTAG connected to J8 0 1 0 ARM2 JTAG connected to J8 0 1 1 ARM1 and ARM2 JTAG connected in daisy chain to J8 1 0 0 ARM1 JTAG connected to J8 and ARM2 JTAG connected to J18. 1 0 1 ARM1 ETM interface enabled. (J5) 1 1 0 ARM2 ETM interface enabled. (J5) 1 1 1 ARM1 and ARM2 ETM interface enabled. ARM1 on J5 and AMR2 on J6. Table 9. Switch 1 (functional configuration) Test bit Functional configuration 654 0 0 0 Default configuration 0 0 1 Nand Flash Interface disable (not usable on the board) 0 1 0 LCD interface disabled (not usable on the board) 0 1 1 GMAC interface disabled (not usable on the board) 1 0 0 FPGA interface enabled with clock and reset coming from FPGA to SPEAr 1 0 1 FPGA interface enabled with clock and reset coming from SPEAr to FPGA. 110 Reserved 111 Reserved |
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