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LT1307/LT1307B

BLOCK DIAGRAM

VC (Pin 1): Compensation Pin for Error Amplifier. Con-

nect a series RC from this pin to ground. Typical values

are 100k

Ω and 680pF. Minimize trace area at VC.

FB (Pin 2): Feedback Pin. Reference voltage is 1.22V.

Connect resistor divider tap here. Minimize trace area at

FB. Set VOUT according to: VOUT = 1.22V(1 + R1/R2).

SHDN (Pin 3): Shutdown. Ground this pin to turn off

switcher. Must be tied to VIN (or higher voltage) to enable

switcher. Do not float the SHDN pin.

GND (Pin 4): Ground. Connect directly to local ground

plane.

PIN FUNCTIONS

SW (Pin 5): Switch Pin. Connect inductor/diode here.

Minimize trace area at this pin to keep EMI down.

VIN (Pin 6): Supply Pin. Must have 1µF ceramic bypass

capacitor right at the pin, connected directly to ground.

LBI (Pin 7): Low-Battery Detector Input. 200mV refer-

ence. Voltage on LBI must stay between ground and

700mV.

LBO (Pin 8): Low-Battery Detector Output. Open collec-

tor, can sink 10

µA. A 1MΩ pull-up is recommended.

Figure 2. LT1307/LT1307B Block Diagram

–

COMPARATOR

RAMP

GENERATOR

BIAS

×10

ENABLE

200mV

A = 3

ERROR

AMPLIFIER

0.15

Ω

DRIVER

GND

1307 F02

600kHz

OSCILLATOR

LBO

LBI

SHDN

SHUTDOWN

40k

(EXTERNAL)

30k

140k

VIN

VOUT

(EXTERNAL)

*HYSTERESIS IN LT1307 ONLY

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