Mobile-Radio Analog Controller

6

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Pin Description

NAME

FUNCTION

1

RPS

Used to measure reverse-transmit power level. Only active in transmit mode when PKWDW = 1,

SDAC[F/R] = Reverse. When not selected, this pin is internally pulled to AGND through a 200

Ω switch.

2

FPS2

Used to measure forward power-sense class 2/3/4. Only active in transmit mode when GDAC[Power

Class] = Class 2/3/4, PKWDW = 1, and SDAC[F/R] = Forward. When not selected, this pin is internally

pulled to AGND through a 200

Ω switch.

PIN

3

FPS1

Used to measure forward power-sense level 1. Only active in transmit mode when GDAC[Power Class] =

Class 1, PKWDW = 1, and SDAC[F/R] = Forward. When not selected, this pin is internally pulled to AGND

through a 200

Ω switch.

4

SDAC

Buffered output of 7-bit DAC. Controls gain stage in up/down converter.

8

REF

1.028V Reference Voltage Output

7

AGND

Analog Ground

6

XDAC

Unbuffered output of 6-bit DAC. Used to control VCXO frequency.

5

Analog Supply Voltage

13

PSDCTRL

Preamble-Switched Diversity Measurement-Control Signal (Figure 2). This pin has a 20k

Ω pull-down

resistor to digital ground.

12

BANT

Best-Antenna Digital Output. Result of preamble-switched diversity measurement (Figure 2). “0” indicates

more power was sensed from period A with respect to period B. “1” means vice versa. Period A is

sensed in the first 12 clock periods following the PSDWDW rising edge.

11

SDG

Software-Programmable Logic Output. Can be used to shut down external bias generator.

10

GDAC

Buffered output of 6-bit DAC. Controls negative gate bias voltage of external power amplifier.

9

KDAC

Buffered output of 7-bit DAC. Controls gain stage in external modulator block.

14

PSDWDW

Preamble-Switched Diversity Measurement Window (Figure 2). This pin has a 20k

Ω pull-down resistor to

digital ground.

15

ADCCTRL

RSSI/Power-Sense Measurement-Control Input (Figure 1)

19

SCLK

Serial-Clock Input. Clock can be stopped and resumed at any time (40% to 60% duty cycle).

18

DGND

Digital Ground

17

DOUT

Serial-Data Output. Enabled when CS is low.

16

PKWDW

RSSI/Power-Sense Measurement-Window Digital Input (Figure 1)

24

RSSI

Received-Signal Strength Indicator Analog Input for power-sense and antenna diversity measurements.

Signal goes into peak-detector circuit and is sampled at the end of the measurement window by the 8-bit

ADC. Only active in receive mode when PKWDW = 1. Peak-detector circuit can be bypassed by using

CH1 as the ADC input.

23

PSBIAS

Power-Sense Measurement Buffered-Bias Output Voltage. Active only during power sensing.

22

CS

Chip Select Input. Enables serial interface when low.

21

DIN

Serial-Data Input

20

Digital Supply Voltage