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MAX1637EEE Datasheet(PDF) 16 Page - Maxim Integrated Products |
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MAX1637EEE Datasheet(HTML) 16 Page - Maxim Integrated Products |
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16 / 20 page ![]() Miniature, Low-Voltage, Precision Step-Down Controller 16 ______________________________________________________________________________________ Use only specialized low-ESR capacitors intended for switching-regulator applications, such as AVX TPS, Sprague 595D, Sanyo OS-CON, or Nichicon PL series. To ensure stability, the capacitor must meet both mini- mum capacitance and maximum ESR values as given in the following equations: COUT > VREF(1 + VOUT / VIN(MIN)) / VOUT x RSENSE x ƒ RESR < RSENSE x VOUT / VREF where RESR can be multiplied by 1.5, as discussed below. These equations are worst case, with 45 degrees of phase margin to ensure jitter-free, fixed-frequency operation, and provide a nicely damped output response for zero to full-load step changes. Some cost- conscious designers may wish to bend these rules with less-expensive capacitors, particularly if the load lacks large step changes. This practice is tolerable if some bench testing over temperature is done to verify acceptable noise and transient response. No well-defined boundary exists between stable and unstable operation. As phase margin is reduced, the first symptom is timing jitter, which shows up as blurred edges in the switching waveforms where the scope does not quite sync up. Technically speaking, this jitter (usually harmless) is unstable operation since the duty factor varies slightly. As capacitors with higher ESRs are used, the jitter becomes more pronounced, and the load-transient output voltage waveform starts looking ragged at the edges. Eventually, the load-transient waveform has enough ringing on it that the peak noise levels exceed the allowable output voltage tolerance. Note that even with zero phase margin and gross instability, the output voltage seldom declines beyond IPEAK x RESR (under constant loads). Designers of RF communicators or other noise-sensi- tive analog equipment should be conservative and stay within the guidelines. Designers of notebook computers and similar commercial-temperature-range digital sys- tems can multiply the RESR value by a factor of 1.5 without affecting stability or transient response. The output voltage ripple, which is usually dominated by the filter capacitor’s ESR, can be approximated as IRIPPLE x RESR. There is also a capacitive term, so the full equation for ripple in continuous-conduction mode is VRIPPLE(p-p) = IRIPPLE x [RESR + 1 / (2 πƒ x COUT)]. In idle mode, the inductor current becomes discontinuous, with high peaks and widely spaced pulses, so the noise can actually be higher at light load (compared to full load). In idle mode, calculate the output ripple as follows: VRIPPLE(p-p) = (0.02 x RESR / RSENSE) + [0.0003 x L x (1 / VOUT + 1 / (VIN - VOUT)) / RSENSE2 x CF ] Selecting Other Components MOSFET Switches The high-current N-channel MOSFETs must be logic- level types with guaranteed on-resistance specifications at VGS = 4.5V. Lower gate-threshold specifications are better (i.e., 2V max rather than 3V max). Drain-source breakdown voltage ratings must at least equal the maxi- mum input voltage, preferably with a 20% margin. The best MOSFETs have the lowest on-resistance per nanocoulomb of gate charge. Multiplying RDS(ON) by Qg provides a good figure of merit for comparing vari- ous MOSFETs. Newer MOSFET process technologies with dense cell structures generally perform best. The internal gate drivers tolerate >100nC total gate charge, but 70nC is a more practical upper limit to maintain best switching times. In high-current applications, MOSFET package power dissipation often becomes a dominant design factor. I2R power losses are the greatest heat contributor for both high-side and low-side MOSFETs. I2R losses are distributed between Q1 and Q2 according to duty fac- tor, as shown in the following equations. Generally, switching losses affect only the upper MOSFET since the Schottky rectifier usually clamps the switching node before the synchronous rectifier turns on. Gate-charge losses are dissipated by the driver and do not heat the MOSFET. Calculate the temperature rise according to package thermal-resistance specifications to ensure that both MOSFETs are within their maximum junction temperature at high ambient temperature. The worst- case dissipation for the high-side MOSFET occurs at both extremes of input voltage, and the worst-case dis- sipation for the low-side MOSFET occurs at maximum input voltage. Duty = (VOUT + VQ2) / (VIN - VQ1) PD (UPPER FET) = ILOAD2 x RDS(ON) x duty + VIN x ILOAD x ƒ x [(VIN x CRSS) / IGATE + 20ns] PD (LOWER FET) = ILOAD2 x RDS(ON) x (1 - duty) where VQ = the on-state voltage drop (ILOAD x RDS(ON)), CRSS = the MOSFET reverse transfer capaci- tance, IGATE = the DH driver peak output current capa- bility (1A typ), and the DH driver inherent rise/fall time is 20ns. The MAX1637’s output undervoltage shutdown function protects the synchronous rectifier under output short-circuit conditions. To reduce EMI, add a 0.1µF ceramic capacitor from the high-side switch drain to the low-side switch source. |
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