LPV542

SNOSCX9 – MARCH 2015

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9 Power Supply Recommendations

The LPV542 is specified for operation from 1.6 V to 5.5 V (±0.8 V to ±2.75 V) over a –40°C to 125°C

temperature range. Parameters that can exhibit significant variance with regard to operating voltage or

temperature are presented in the Typical Characteristics.

CAUTION

Supply voltages larger than 6 V can permanently damage the device.

For proper operation, the power supplies bust be properly decoupled. For decoupling the supply lines it is

suggested that 10 nF capacitors be placed as close as possible to the operational amplifier power supply pins.

Low bandwidth nanopower devices do not have good high frequency (> 1 kHz) AC PSRR rejection against high-

frequency switching supplies and other 1 kHz and above noise sources, so extra supply filtering is recommended

if kilohertz or above noise is expected on the power supply lines.

10 Layout

10.1 Layout Guidelines

The V+ pin should be bypassed to ground with a low ESR capacitor.

The optimum placement is closest to the V+ and ground pins.

Care should be taken to minimize the loop area formed by the bypass capacitor connection between V+ and

ground.

The ground pin should be connected to the PCB ground plane at the pin of the device.

The feedback components should be placed as close to the device as possible to minimize strays.

There is an internal electrical connection between the exposed Die Attach Pad (DAP) and the V- pin. For best

performance the DAP should be connected to the exact same potential as the V- pin. Do not use the DAP as the

primary V- supply. Floating the DAP pad is not recommended. The DAP and V- pin should be joined directly as

shown in the Layout Example.

10.2 Layout Example

Figure 41. X1SON Layout Example (top view)

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