CMX148 datasheet(2/75 Pages) CMLMICRO

2 / 75 page

PMR Audio and Data Processor

CMX148

D/148/6

CONTENTS

Section

Page

1. Brief Description.....................................................................................................................1

1.1.

History..........................................................................................................................5

2. Block Diagram ........................................................................................................................6

3. Signal List................................................................................................................................7

4. External Components ............................................................................................................9

5. PCB Layout Guidelines and Power Supply Decoupling...................................................11

6. General Description .............................................................................................................12

7. Detailed Descriptions...........................................................................................................13

7.1.

Device Identification Code.........................................................................................13

7.2.

Xtal Frequency ..........................................................................................................13

7.3.

Host Interface ............................................................................................................13

7.4.

Device Control ...........................................................................................................15

7.4.1. Signal Routing.....................................................................................................15

7.4.2. Mode Control ......................................................................................................16

7.5.

Audio Functions.........................................................................................................17

7.5.1. Audio Receive Mode...........................................................................................17

7.5.2. Audio Transmit Mode..........................................................................................20

7.6.

External Sub-Audio Signalling...................................................................................26

7.7.

Inband Signalling .......................................................................................................26

7.7.1. Receiving DTMF Tones ......................................................................................27

7.7.2. Transmitting DTMF Tones ..................................................................................27

7.7.3. Transmitting Audio Tones ...................................................................................27

7.8.

MSK/FFSK Data Modem ...........................................................................................27

7.8.1. Receiving MSK/FFSK Signals ............................................................................28

7.8.2. Transmitting MSK/FFSK Signals ........................................................................28

7.9.

MSK/FFSK Data Packetising ....................................................................................29

7.9.1. Tx Hang Bit .........................................................................................................29

7.9.2. Frame Format .....................................................................................................29

7.9.3. Frame Head ........................................................................................................29

7.9.4. Data Block Coding ..............................................................................................30

7.9.5. CRC and FEC Encoding Information..................................................................31

7.9.6. Data Interleaving.................................................................................................31

7.9.7. Data Scrambling/Privacy Coding ........................................................................31

7.9.8. Data Buffer Timing ..............................................................................................32

7.10.

Auxiliary ADC Operation ...........................................................................................32

7.11.

Auxiliary DAC/RAMDAC Operation...........................................................................33

7.12.

Digital System Clock Generator ................................................................................34

7.12.1. Main Clock Operation .........................................................................................35

7.12.2. System Clock Operation .....................................................................................35

7.13.

GPIO..........................................................................................................................35

7.14.

Signal Level Optimisation..........................................................................................35

7.14.1. Transmit Path Levels ..........................................................................................35

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