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FX929B Datasheet(PDF) 1 Page - CML Microcircuits |
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FX929B Datasheet(HTML) 1 Page - CML Microcircuits |
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1 / 48 page ![]() CML Semiconductor Products 4-Level FSK Modem Data Pump FX929B © 1997 Consumer Microcircuits Limited Advance Information D/929B/1 May 1997 Features Applications •• 4800 to 19200 b/s Operation •• RCR STD-47 and RD-LAP* Systems •• Full Packet Data Framing •• Two-Way Paging Equipment •• 4-Level FSK Data Modulation •• Mobile Data Systems •• Low Power, 2.5mA at 3.3V •• Wireless Telemetry •• Flexible Operating Modes •• DataTAC®® Terminals •• Powersave Option •• Portable Wireless Data Equipment *Radio Data-Link Access Procedure (RD-LAP) is a data communications air interface protocol developed by Motorola Inc. 1.1 Brief Description The FX929B is a CMOS integrated circuit that contains all of the baseband signal processing and Medium Access Control (MAC) protocol functions required for a high performance 4-level FSK Wireless Packet Data Modem. It interfaces with the modem host processor and the radio modulation/demodulation circuits to deliver reliable two-way transfer of the application data over the wireless link. The FX929B is backwards compatible with the FX929A but offers better performance during radio link fading and selectable Tx symbol shapes. The FX929B assembles application data received from the processor, adds forward error correction (FEC) and error detection (CRC) information and interleaves the result for burst-error protection. After adding symbol and frame synchronisation codewords, it converts the packet into a filtered 4-level analogue baseband signal for modulating the radio transmitter. In receive mode, the FX929B performs the reverse function using the analogue baseband signals from the receiver discriminator. After error correction and removal of the packet overhead, the recovered application data is supplied to the processor. Any residual uncorrected errors in the data will be flagged. A readout of the SNR value during receipt of a packet is also provided. The FX929B uses data block sizes and FEC/CRC algorithms compatible with the RD-LAP and RCR STD-47 over-air standards. The device is programmable to operate at most standard bit-rates from a wide choice of Xtal/clock frequencies. D2 D5 P4 |
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