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AM4376 Datasheet(PDF) 189 Page - Texas Instruments |
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AM4376 Datasheet(HTML) 189 Page - Texas Instruments |
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189 / 261 page  A1 A2 Device Address and Control Output Buffer DDR3 Address and Control Input Buffers AT Vtt Address and Control Terminator Rtt A1 A2 Device Differential Clock Output Buffer DDR3 Differential CK Input Buffer Routed as Differential Pair AT Rcp Clock Parallel Terminator A1 A2 AT Rcp Cac VDDS_DDR 0.1 µF + – + – AM4376, AM4377, AM4378, AM4379 www.ti.com SPRS851B – JUNE 2014 – REVISED APRIL 2015 5.12.8.2.1.4.7 One 16-Bit DDR3 Device One DDR3 device is supported on the DDR3 interface consisting of one x16 DDR3 device arranged as one 16- bit bank. 5.12.8.2.1.4.8 CK and ADDR_CTRL Topologies, One DDR3 Device Figure 5-68 shows the topology of the CK net classes and Figure 5-69 shows the topology for the corresponding ADDR_CTRL net classes. Figure 5-68. CK Topology for One DDR3 Device Figure 5-69. ADDR_CTRL Topology for One DDR3 Device Copyright © 2014–2015, Texas Instruments Incorporated Specifications 189 Submit Documentation Feedback Product Folder Links: AM4376 AM4377 AM4378 AM4379 |
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