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DM385 Datasheet(PDF) 187 Page - Texas Instruments |
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DM385 Datasheet(HTML) 187 Page - Texas Instruments |
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187 / 281 page ![]() Address Valid Valid D3 GPMC_CLK GPMC_CS[x] GPMC_A[27:0] GPMC_ _CLE BE0 GPMC_BE1 GPMC_ _ALE ADV GPMC_OE GPMC_D[15:0] (Non-Multplexed Mode) GPMC_WAIT[x] 1 13 3 2 9 19 11 4 5 9 8 21 20 10 12 8 2 7 7 20 23 14 13 22 13 D1 D2 D0 13 GPMC_CLK GPMC_CS[x] GPMC_A[27:0] GPMC_ _CLE BE0 GPMC_BE1 GPMC_ _ALE ADV GPMC_OE GPMC_D[15:0] GPMC_WAIT[x] Address D0 1 13 14 7 3 2 2 9 19 11 4 5 9 8 21 20 20 10 12 7 8 23 22 DM385, DM388 www.ti.com SPRS821D – MARCH 2013 – REVISED DECEMBER 2013 Figure 8-21. GPMC Non-Multiplexed NOR Flash - Synchronous Single Read (GPMCFCLKDIVIDER = 0) Figure 8-22. GPMC Non-Multiplexed NOR Flash - 14x16-bit Synchronous Burst Read (GPMCFCLKDIVIDER = 0) Copyright © 2013, Texas Instruments Incorporated Peripheral Information and Timings 187 Submit Documentation Feedback Product Folder Links: DM385 DM388 |
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