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DM385 Datasheet(PDF) 189 Page - Texas Instruments |
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DM385 Datasheet(HTML) 189 Page - Texas Instruments |
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189 / 281 page  Address (MSB) D1 D2 D0 GPMC_CLK GPMC_CS[x] GPMC_A[27:16] GPMC_ _CLE BE0 GPMC_BE1 GPMC_ _ALE ADV GPMC_WE GPMC_D[15:0] (Multiplexed Mode) GPMC_WAIT[x] 2 3 9 19 4 5 9 10 2 7 7 22 D3 1 15 15 23 18 18 18 18 18 18 16 16 16 21 Address (LSB) 6,16 5 6 Address (MSB) Valid Valid D3 GPMC_CLK GPMC_CS[x] GPMC_A[27:16] GPMC_ _CLE BE0 GPMC_BE1 GPMC_ _ALE ADV GPMC_OE GPMC_D[15:0] (Multplexed Mode) GPMC_WAIT[x] 1 13 3 2 9 19 11 4 5 9 8 21 20 10 12 8 2 7 7 20 23 14 13 22 13 D1 D2 D0 13 Address (LSB) 6 5 DM385, DM388 www.ti.com SPRS821D – MARCH 2013 – REVISED DECEMBER 2013 Figure 8-25. GPMC Multiplexed NOR Flash - 14x16-bit Synchronous Burst Read (GPMCFCLKDIVIDER = 0) Figure 8-26. GPMC Non-Multiplexed NOR Flash - Synchronous Burst Write (GPMCFCLKDIVIDER = 0) 8.8.2.2 GPMC and NOR Flash Interface Asynchronous Mode Timing (Non-Multiplexed and Multiplexed Modes) Copyright © 2013, Texas Instruments Incorporated Peripheral Information and Timings 189 Submit Documentation Feedback Product Folder Links: DM385 DM388 |
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