DM385 datasheet(191/281 Pages) TI

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GPMC_CLK

GPMC_CS[x]

GPMC_A[10:1]

GPMC_

_CLE

BE0

GPMC_BE1

GPMC_

_ALE

ADV

GPMC_OE

GPMC_D[15:0]

GPMC_WAIT[x]

Valid Address

GPMC_FCLK

Data In 0

DM385, DM388

www.ti.com

SPRS821D – MARCH 2013 – REVISED DECEMBER 2013

Table 8-30. Switching Characteristics Over Recommended Operating Conditions for GPMC and NOR

Flash Interface - Asynchronous Mode (continued)

(see Figure 8-27, Figure 8-28, Figure 8-29, Figure 8-30 for Non-Multiplexed Modes)

(see Figure 8-31, Figure 8-32 for Multiplexed Modes)

OPP100/OPP120/Turb

o/Nitro

PARAMETER

UNIT

MIN

MAX

td(nCSV-nWEIV)

Delay time, GPMC_CS[x] valid to GPMC_WE invalid

F - 0.2(12)

F + 2.0(12)

td(nWEV-DV)

Delay time, GPMC_WE valid to GPMC_D[15:0] data bus valid

2.0

td(DV-nCSV)

Delay time, GPMC_D[15:0] data bus valid to GPMC_CS[x] valid

J - 0.2(5)

J + 2.0(5)

td(ADVV-AIV)

Delay time, GPMC_ADV_ALE valid to GPMC_D[15:0] address invalid

2.0

Delay time, GPMC_OE_RE valid to GPMC_D[15:0] address/data busses phase

td(nOEV-AIV)

2.0

end

td(AIV-ADVV)

Delay time, GPMC_D[15:0] address valid to GPMC_ADV_ALE invalid

2.0

(12) = F - nCS Max Delay + nWE Min Delay

F = ((WEOffTime - CSOnTime) * (TimeParaGranularity + 1) + 0.5 * (WEExtraDelay - CSExtraDelay)) * GPMC_FCLK

Figure 8-27. GPMC/Non-Multiplexed NOR Flash - Asynchronous Read - Single Word Timing

Peripheral Information and Timings

191

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