MIC2182 datasheet(15/28 Pages) MICREL

15 / 28 page

June 2000

MIC2182

Micrel

• Reduced maximum duty cycle due to switching

transition times and constant delay times in the

controller. As the switching frequency increased,

the switching period decreases. The switching

transition times and constant delays in the

MIC2182 start to become noticeable. The effect

is to reduce the maximum duty cycle of the

controller. This will cause the minimum input to

output differential voltage (dropout voltage) to

increase.

100

12 16 20 24 28 32

SUPPLY VOLTAGE (V)

400kHz

300kHz

500kHz

SOP

Figure 10a. SOP Gate Charge vs. Input Voltage

100

12162024 2832

SUPPLY VOLTAGE (V)

SSOP

400kHz

300kHz

500kHz

Figure 10b. SSOP Gate Charge vs. Input Voltage

It is recommended that the user limits the maximum synchro-

nized frequency to 600kHz. If a higher synchronized fre-

quency is required, it may be possible and will be design

dependent. Please consult Micrel applications for assis-

tance.

Soft Start

Soft start reduces the power supply input surge current at

startup by controlling the output voltage rise time. The input

surge appears while the output capacitance is charged up. A

slower output rise time will draw a lower input surge current.

Soft start may also be used for power supply sequencing.

The soft-start voltage is applied directly to the PWM compara-

tor. A 5uA internal current source is used to charge up the

soft-start capacitor. The capacitor is discharged when either

the enable voltage drops below the UVLO threshold (2.5V) or

the V

DD voltage drops below the UVLO level (4.1V).

The part switches at a minimum duty cycle when the soft-start

pin voltage is less than 0.4V. This maintains a charge on the

bootstrap capacitor and insures high-side gate drive voltage.

As the soft-start voltage rises above 0.4V, the duty cycle

increases from the minimum duty cycle to the operating duty

cycle. The oscillator runs at the foldback frequency of 60kHz

until the output voltage rises above 0.95V. Above 0.95V, the

switching frequency increases to 300kHz (or the sync’d

frequency), causing the output voltage to rise a greater rate.

The rise time of the output is dependent on the soft-start

capacitor, output capacitance, output voltage, and load cur-

rent. The oscilloscope photo in Figure 9 show the output

voltage and the soft-start pin voltage at startup.

Minimum Pulse Width

The MIC2182 has a specified minimum pulse width. This

minimum pulse width places a lower limit on the minimum

duty cycle of the buck converter. When the MIC2182 is

operating in forced PWM mode (pin 2 low) and when the

output current is very low or zero, there is a limit on the ratio

of V

OUT/VIN. If this limit is exceeded, the output voltage will

rise above the regulated voltage level. A minimum load is

required to prevent the output from rising up. This will not

occur for output voltages greater than 3V.

Figure 11 should be used as a guide when the MIC2182 is

forced into PWM-only mode. The actual maximum input

voltage will depend on the exact external components used

(MOSFETs, inductors, etc.).

OUTPUT VOLTAGE (V)

Figure 11. Max. Input Voltage in Forced-PWM Mode

This restriction does not occur when the MIC2182 is set to

automatic mode (pin 2 connected to a capacitor) since the

converter operates in skip mode at low output current.

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