LMC6772 datasheet(3/25 Pages) TI

3 / 25 page

LMC6772

www.ti.com

SNOS749F – SEPTEMBER 1995 – REVISED MARCH 2013

2.7V Electrical Characteristics

Unless otherwise specified, all limits ensured for TJ = 25°C, V

+ = 2.7V, V− = 0V, V

CM = V

+/2. Boldface limits apply at the

temperature extremes.

Symbol

Parameter

Conditions

Typ(1)

LMC6772AI LMC6772BI

LMC6772Q

Units

Limit(2)

VOS

Input Offset Voltage

max

TCVOS

Input Offset Voltage Temperature

2.0

μV/°C

Drift

Input Offset Voltage Average

See(3)

3.3

μV/Mont

Drift

Input Current

0.02

IOS

Input Offset Current

0.01

CMRR

Common Mode Rejection Ratio

PSRR

Power Supply Rejection Ratio

±1.35V < VS < ±7.5V

Voltage Gain

(By Design)

100

VCM

Input Common-Mode Voltage

CMRR > 55 dB

3.0

2.9

Range

2.7

min

−0.3

−0.2

0.0

0.2

max

VOL

Output Voltage Low

ILOAD = 2.5 mA

0.2

0.3

0.4

0.45

max

Supply Current

For Both Comparators

μA

(Output Low)

max

ILeakage

Output Leakage Current

VIN(+) = 0.5V,

0.1

500

VIN(−) = 0V, VO = 15V

1000

(1)

Typical Values represent the most likely parametric norm.

(2)

All limits are specified by testing or statistical analysis.

(3)

Input offset voltage Average Drift is calculated by dividing the accelerated operating life drift average by the equivalent operational time.

The input offset voltage average drift represents the input offset voltage change at worst-case input conditions.

Submit Documentation Feedback

Product Folder Links: LMC6772

LMC6772 Datasheet(PDF) 3 Page - Texas Instruments

LMC6772 Datasheet(HTML) 3 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25

Datasheet Download

Link URL