RF64 datasheet(43/76 Pages) ETC2

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ADVANCED COMMUNICATIONS & SENSING

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RF64

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5.3.5. uC Connections

RF64

DATA

IRQ_0

IRQ_1 (DCLK)

NSS_CONFIG

SCK

MOSI

MISO

Figure 37: uC Connections in Continuous Mode

Note that some connections may not be needed depending on the application:

 IRQ_0: if Sync and RSSI interrupts are not used. In this case, leave floating.

 IRQ_1: if the chip is never used in Tx FSK mode (DCLK connection is not compulsory in Rx and Tx OOK

modes). In this case, leave floating.

 MISO: if no read register access is needed. In this case, pull-up to VDD through a 100 k

Ω resistor.

In addition, NSS_DATA pin (unused in continuous mode) should be pulled-up to VDD through a 100 k

Ω resistor.

Please refer to Table 13 for RF64

‟s pins configuration

5.3.6. Continuous Mode Example

 Configure all data processing related registers listed below appropriately. In this example we assume that both

Bit synchronizer and Sync word recognition are on.

Table 19: Relevant Configuration Registers in Continuous Mode (data processing related only)

Description

MCParam

Data_mode_x

Defines data operation mode (=> Continuous)

IRQParam

Rx_stby_irq_0

Defines IRQ_0 source in Rx mode

RXParam

Sync_on

Enables Sync word recognition

Sync_size

Defines Sync word size

Sync_tol

Defines the error tolerance on Sync word recognition

SYNCParam

Sync_value

Defines Sync word value

Tx Mode:

 Go to Tx mode (and wait for Tx to be ready, see Figure 50)

 Send all pa

cket‟s bits on DATA pin synchronously with DCLK signal provided on IRQ_1

 Go to Sleep mode

Rx Mode:

 Program Rx interrupts: IRQ_0 mapped to Sync (Rx_stby_irq

_0=”00”) and IRQ_1 mapped to DCLK (Bit

synchronizer enabled)

 Go to Rx mode (note that Rx is not ready immediately, see Figure 49)

 Wait for Sync interrupt

 Get all packet bits on DATA pin synchronously with DCLK signal provided on IRQ_1

 Go to Sleep mode

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